Hi,
I am using the voltage error * gain to set dutycycle for regulating the voltage output of a power supply, under load we are getting a couple volts lower output voltage than the desired output voltage, but other than that overall the regulation seems to be working well. What is a good way to regulate up to the last couple of volts? I was thinking adding an intergral term to the dutycycle calculation (summed voltage error over time * gain) to make it a PI loop, but is there other techniques that work well or better than the standard PID loop technique for power supply regulation?
cheers, Jamie