Planar NPN Transistor in Magic or Electric VLSI?

Hi everybody,

I'm going through Camenzind's Designing Analog Chips, and not far into it i s the simple planar NPN transistor; how would I represent this in Magic?

Assuming the substrate is P, the N well for the collector makes sense, as d oes the P diffusion for the base, however the n+ emitter region within the base which resides in a N well - we could get away with an n+ contact regio n I think, but would that be right?

Also would that extract correctly?

I intend to try the same thing with Electric VLSI after, as a comparison.

Thanks all!

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