PCB Layout Designers

Tom wrote:

"Installing gEDA/gaf on Windows--the Cygwin way" by werner

You can test drive gEDA without installing it (even on a Windoze box):

*-Knoppix-like-CD-with-gEDA-*-*+Quantian+Cygwin+Win-2000-or-XP+Gtk.libraries+MinGW+qq+*-distro-*-*-providing-open-source-scientific-and-engineering-apps+recent.improvements

For just pcb, Dan has a windows installer I've pre-tested. It's mingw-based, no cygwin required.

snip)

Crikey, 1R5 is a looong way from 1.5k. I hope* that was just a typo or brain fade there Mike.

I'm a one-man band when it comes to circuit and pcb design, and I prefer manual layout (two layers only) over importing a schematic into the pcb software. I find that:

. package placement is easier without the ratsnest, but with the ability to have just a selection of interconnections showing. . the autorouter is great at achieving 85% faster than me, but often fails to complete and I have to undo sooo much that I haven't used autorouting in the last five years. . I have developed a fairly thorough and successful checking process that hasn't let a layout/connection error through in those five years.

Now all they need to do is formally release Schematic into the public domain.

Brain fade. Focus on one thing, and type something else.

Of course, my data entry software would have caught that instantly. It knows I don't normally use 1.5 ohm resistors!

That's where writing your own cad interface can really help. It checks the value to ensure it is legal, checks stock to see if it needs to be ordered, and checks the part history to see if the component is common or seldom used. If there is any problem, it shows a message with the infomation and asks if you really want to do that. Binary searches are used wherever possible so the results are instantaneous and it doesn't slow you down.

Checks like these can do a lot to ensure the data is correct before it is entered into the cad program. The whole idea is to let the computer take care of the details, and to keep bad or erroneous data from entering the system in the first place.

Regards,

Mike Monett

Absolutely. I started doing this after I had accidentally stumbled across mistakes in a netlist that I had created for a different purpose.

robert

I'd consider that a serious bug, and I don't consider a program that has this bug to be an electronics CAD package. I mean, this routine stuff is the FIRST THING that such CAD programs MUST DO RIGHT 100%.

robert

I find the ratsnest very useful, particularly used in conjunction with connection swap and back- annotation to the schematic. But then, I'm usually tracking microcontroller and/or PLD designs for logic. It lets you optimise positions and pinouts for easy routing before a trace is laid.

That's not unusual. All but the most expensive autorouters need lots of spare PCB.

Paul Burke

We recently did a board that has over 1000 parts, including a uP and two FPGAs, 8 layers, parts on both sides. Hand checking that would probably take two people a week or so, one calling out connections and the other tracing them. PADS will do a full connectivity check on this board in about 2 seconds, and a full design-rule check in under 10.

We do the full schematic thing for even the tiniest boards. One nice thing is that you can ECO a schematic and export the changes to the PCB and keep things in sync. You can also resequence the ref designators on the board and back-annotate the schematic. We formally release the schematic and the PCB files together, and we have a rule that they *must* fully cross-check.

We never autoroute, and almost always go with the pins as originally assigned on the schematic, ie no pin or gate swapping. We also often pass the design around from person to person. An engineer may do some critical placement as a model, our layout guy does the real work, then another engineer or two may have a final lick at it, checking critical clock nets and such.

John

I do too. However, since Orcad moved their developement to India, there are many bugs they have introduced, some scarry, some annoying.

--
Mark

I treat my autorouter like a dog on a chain... (What's smarter ...An autorouter or a dog? ) The dog can pull on the chain in all different directions. I use a short chain and never let the dog loose.. Training helps... I've had better results by tweeking the autorouting settings. So... I just beat my autorouter with a rolled up newspaper when it's bad. (I wouldn't do that to a dog..just the autorouter..)

I take my autorouter for short walks only..always on the chain..When I don't like where the dog is going..I just pull on the chain..

Some autorouter users I can imagine just let all the untrained dogs out and the pcb turns into a mess.. Right...like they think they got the Hal 9000 doing the routing.. :) D from BC

Some systems, you can turn off the rats nest. I usually do this when placing parts.

Don't know why you want to suffer thru hand checking a board! DRC takes less than a minute on most of my boards. I remember the days of two people hand checking a board for 4 to 8 hours. Hate to think how much time my last board with 1800 parts would take to hand check the connectivity.

--
Mark

I've probably asked before, but what did you say your schematic capture tool of choice is?

Is that because... you're thinking the particular pin or gate used might have been done so for a reason?

In general I find pin and gate swapping of great help, and the guy who entered the schematic can just set the appropriate attribute if he doesn't want the pin or gate swapping enabled for the net in question.

We use ORCAD and PADS for production PCBs, but have no path to back-annotate reference designator changes in PADS back to the schematic (other than doing it manually, of course). We've occasionally looked around at third-party tools such as Prescience to do this, but no one ever had enough time to do a serious eval.

---Joel

We use PADS-Logic for schematic entry and PADS PowerPCB v5 for layout. Bugs/crashes are virtually nonexistant. Logic the nicest schematic editor I've ever used.

Not really. If we expect congestion (say, a dozen 12-bit ADCs feeding a big FPGA) we pre-plan the connections before we enter the schematic, so things flow pretty well. For smaller glue-logic type stuff, our layout guy seems to just make it work.

In a few recent cases, we told our guy to just use any one of a bunch of uncommitted FPGA pins, whichever way worked easiest, and let him handle it. I guess he did hot-wire the connections on the board and back-annotate the schematic, which is technically not pin-swapping because there never were any pins to swap! We can finally export the board netlist and use that to make the FPGA pin constraints file.

PADS just does that. When you resequence, it makes a back-ECO file. If you use Orcad for schematics and PADS for layout, maybe that won't work.

PADS does, or can do, anything in ASCII. You can export an entire design in readable ascii form, pcb or schematic, and even include the library symbols if you like. That lets us look at and process the files if we want, which is sometimes handy. We've had one or two cases of weird behavior that were fixed by an ascii export-import cycle.

John

Yeah, that was tedious. A half-dozen "verify connectivity" runs, using maybe a minute total of CPU time, essentially pays for the entire pcb cad suite!

John

manual

We go a few steps better with Altium Designer and make sure every part in our library has the full datasheet attached to every component, along with a physical 3D model, and all the required manufacturing and sourcing details. It's a lot of work up front, but it really pays dividends when you can simply hit a button and generate full manufacturing and purchasing BOM's and *know* it's all correct. Datasheet linking is like having a scrolly-wheel mouse, once you've used it you never want to go back.

Dave.

manual

We go a few steps better with Altium Designer and make sure every part in our library has the full datasheet attached to every component, along with a physical 3D model, and all the required manufacturing and sourcing details. It's a lot of work up front, but it really pays dividends when you can simply hit a button and generate full manufacturing and purchasing BOM's and *know* it's all correct. Datasheet linking is like having a scrolly-wheel mouse, once you've used it you never want to go back.

Dave.

We operate in different worlds, John { ;) >

(snip)

I wonder how many do autoroute at both your level and down here at the base where I operate. The tools are there, but I don't think it is ego that stops most layout people lwetting the autorouter have a go.

I'm surprised that you don't accommodate gate swapping. Assigning a gate from a package at schematic time is an arbitrary thing, and can't second-guess which gate will provide the best layout.