I'm designing an imaging front-end with a CCD Detector. Now I want to predict, what my system SNR will be. From the optics and the detector everything is quite clear and in my model.
How can I model the electronic readout circuit of the CCD, particularly the AD-converter?
Does anyone have experience?
How accurate a model do you want?
As a first cut you can just model the ADC as a pass-through.
Then add in uniformly distributed noise one LSB wide, to simulate quantization.
Then note that a fast ADC like that has more "conventional" noise in it's front end than quantization noise, so add that in as well (consult the data sheets).
Then note that a fast ADC like that suffers from charge injection when it converts, so add in that effect (consult data sheets, app notes, app engineers).
If you are buffering the signal note that your buffer amplifier generates noise -- add that in.
Oh -- your ADC has differential and integral nonlinearity -- do you care? If yes, add it in.
Sampling? Add it in.
Etc.
-- Tim Wescott Wescott Design Services http://www.wescottdesign.com
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