Need higher speed 2N7002

SHHHHT! Don't give away all our trade secrets....

That's what ye olde cascode is for. Oh drat, now I gave one ways.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg
Loading thread data ...

MIT RadLab, vol 18, Vacuum Tube Amplifiers.

Cascode 2N7002's would be interesting. Even more interesting would be to cascode a gaasfet under a 2N7002.

John

Reply to
John Larkin

"Joerg" schrieb im Newsbeitrag news:Fi8sh.34057$ snipped-for-privacy@newssvr22.news.prodigy.net... | > It has just ocurred to me, after all these years duh, that if you | > drive a 2N7002 from a fast logic gate (or preferably several in | > parallel), an inductor in series with the gate may well improve drive | > risetime. Using the old EROT | >

| > L = r^2 * c | >

| | SHHHHT! Don't give away all our trade secrets.... | | | > and assuming, say, 30 ohms and 40 pF, the rough ballpark for L is 40 | > nH, much more than the baseline wirebond inductance. The Miller | > dynamics complicates things a tad, so it's best tested by experiment. | >

| | That's what ye olde cascode is for. Oh drat, now I gave one ways.

And why? I guess because the driver output is nonlinear?? Can it proven by Spice?

- Henry

--

formatting link

Reply to
Henry Kiefer

But the youngsters won't remember that one or have never read anything from the tube days.

Did it about 20 years ago. With PIN diodes in the upper leg for gain control. Ok, only the lower transistor was a 2N7002, the other one was some kind of BFR. But that was mostly because it was quite high volume and cost a few cents less that way. Later we sub'd the 7002 for a BSS123, also for cost reasons.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

news:Fi8sh.34057$ snipped-for-privacy@newssvr22.news.prodigy.net...

You'd cascode to reduce the Miller feedback, which would be useful at high output voltage swings where Cdg gets pumped pretty hard.

John

Reply to
John Larkin

"John Larkin" schrieb im Newsbeitrag news: snipped-for-privacy@4ax.com... | On Fri, 19 Jan 2007 21:27:02 +0100, "Henry Kiefer" | wrote: | | >"Joerg" schrieb im Newsbeitrag news:Fi8sh.34057$ snipped-for-privacy@newssvr22.news.prodigy.net... | >| > It has just ocurred to me, after all these years duh, that if you | >| > drive a 2N7002 from a fast logic gate (or preferably several in | >| > parallel), an inductor in series with the gate may well improve drive | >| > risetime. Using the old EROT | >| >

| >| > L = r^2 * c | >| >

| >| | >| SHHHHT! Don't give away all our trade secrets.... | >| | >| | >| > and assuming, say, 30 ohms and 40 pF, the rough ballpark for L is 40 | >| > nH, much more than the baseline wirebond inductance. The Miller | >| > dynamics complicates things a tad, so it's best tested by experiment. | >| >

| >| | >| That's what ye olde cascode is for. Oh drat, now I gave one ways. | >

| >And why? | >I guess because the driver output is nonlinear?? | >Can it proven by Spice? | >

| >- Henry | | You'd cascode to reduce the Miller feedback, which would be useful at | high output voltage swings where Cdg gets pumped pretty hard.

Thanks, but sorry, my question references to "drive risetime".

- Henry

--

formatting link

Reply to
Henry Kiefer

Newsbeitrag news: snipped-for-privacy@4ax.com...

news:Fi8sh.34057$ snipped-for-privacy@newssvr22.news.prodigy.net...

When the drain roars down then Cgd tried to reduce the gate voltage while the driver tries its darndest to get it up. That results in a risetime penalty.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

"Joerg" schrieb im Newsbeitrag news:Pbesh.62714$ snipped-for-privacy@newssvr13.news.prodigy.net... | When the drain roars down then Cgd tried to reduce the gate voltage | while the driver tries its darndest to get it up. That results in a | risetime penalty.

I see: The peak current is time-spreaded. I'm not sure that the added delay because of the added inductance can overcompensate that current-peak delay??

That works measurable?

- Henry

--

formatting link

Reply to
Henry Kiefer

news:Pbesh.62714$ snipped-for-privacy@newssvr13.news.prodigy.net...

overcompensate that current-peak delay??

You'd be creating a series resonant circuit.

Yes, but don't tell anyone ;-)

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

"Joerg" schrieb im Newsbeitrag news:yPssh.2735$ snipped-for-privacy@newssvr11.news.prodigy.net... | Henry Kiefer wrote: | | > "Joerg" schrieb im Newsbeitrag news:Pbesh.62714$ snipped-for-privacy@newssvr13.news.prodigy.net... | > | When the drain roars down then Cgd tried to reduce the gate voltage | > | while the driver tries its darndest to get it up. That results in a | > | risetime penalty. | >

| > I see: The peak current is time-spreaded. | > I'm not sure that the added delay because of the added inductance can overcompensate that current-peak delay?? | >

| | You'd be creating a series resonant circuit. | | | > That works measurable? | >

| | Yes, but don't tell anyone ;-)

Where is the problem? You know it already ;-)

I will check it if I have free time.

- Henry

--

formatting link

Reply to
Henry Kiefer

news:yPssh.2735$ snipped-for-privacy@newssvr11.news.prodigy.net...

news:Pbesh.62714$ snipped-for-privacy@newssvr13.news.prodigy.net...

overcompensate that current-peak delay??

What's "free time"? You probably aren't married...

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

its time you have to do whatever jobs the wife has lined up for you :)

Cheers Terry

Reply to
Terry Given

"Joerg" schrieb im Newsbeitrag news:Z4vsh.36329$ snipped-for-privacy@newssvr21.news.prodigy.net... | > I will check it if I have free time. | >

| | What's "free time"? You probably aren't married...

You can't train a old dog, or such. My "better side" tried it several times ...

- Henry

--

formatting link

Reply to
Henry Kiefer

And if you don't get enough from that list accomplished that will be follwed by an "iceberg climate". So, back to that dreaded pool pump house now.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

LOL :)

I've gotta go finish rebulding the engine of my van. Who'd want to be a mechanic? greasy, filthy, horrid job.

Cheers Terry

Reply to
Terry Given

Discussed he at length several years ago (though this talks about compensating source lead inductance not Miller):

or

Reply to
Clifford Heath

Well, it works again. Whew. I even cleaned the garage after the job without being admonished. But that doesn't mean I'm off the hook now, the list is longer.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

"Clifford Heath" schrieb im Newsbeitrag news:45b29698$0$9772$ snipped-for-privacy@news.optusnet.com.au... | John Larkin wrote: | > It has just ocurred to me, after all these years duh, that if you | > drive a 2N7002 from a fast logic gate (or preferably several in | > parallel), an inductor in series with the gate may well improve drive | > risetime. | | Discussed he at length several years ago (though this talks about | compensating source lead inductance not Miller): | |

| or

Much shorter here:

formatting link

- Henry

--

formatting link

Reply to
Henry Kiefer

Isnt it always?

I've got the engine back together, sans cam belt. Alas whilst the nice engineer at Mazda NZ sent me a section of the WLT service manual, he neglected the torque & tightening pattern for the cam shaft saddles. Fortunately my Cam belt didnt turn up on friday as expected, so I'll go pick it up tomorrow, and get the last piece of information I require. A bit of a nuisance, I was looking forward to finishing it today :(

At least I can get to the cam shaft and belt with everything else fully assembled.

Now I'm going to design a 50W smps that runs from 100 - 1000Vdc. Actually two - one using a UC38xx, and an alternate version using a few discretes and an HC14. I dreamed up this super-cheap startup regulator (< $0.20, so US$0.15), that includes UVLO. Starting up a regulator can take a while, and my logic and gate driver requires 5V. 1kVdc is a real pain in terms of startup resistors (no space so cant tolerate heat), so I've made a series-pass regulator, that runs off a 100uF cap. It starts when the cap charges to 40V, and turns off if the cap drops to 8V(ish).

All up my DIY controller rocks in at about NZ$0.35, which is 5x less than the UC38xx version. And it has all the bells and whistles; the only real difference is the reference accuracy, but thats what TLV431's were invented for eh?

I've just started using a Chines PCB service,

formatting link
and they are very cheap, and quite fast. So an extra PCB will cost me about US$50, but this way I am guaranteed to get a works-first-time SMPS (the UC38xx), should there be a difference between theory and practice with the DIY version.

Cheers Terry

Reply to
Terry Given

news:45b29698$0$9772$ snipped-for-privacy@news.> | > It has just ocurred to me, after all these years duh, that if you

=PN/5332938>

interesting, but not what JL was talking about. This circuit wont work very well at all if you intend the MOSFET to stay on for any length of time, as the shunt inductor will bugger up the gatedrive. Useless for the majority of FET drivers.

I'm also pretty sure I have seen a very similar technique before, so the patent is probably worthless.

John, why stop there - why not a bridged-T network....

Cheers Terry

Reply to
Terry Given

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.