What about a bridge driver with the bootstrap voltage tied to VCC, and the output going to a transformer? That should give you lots more choices (no 200V business), and hopefully still be useful.
I get my dead time control from whatever microprocessor I'm using to generate my PWM, so the only thing that dead time control on a driver does is get in my way :).
:-)
Wot's Vold****t?
A transformer runs out of steam when duty cycles exceed 90%. Bootstraps are usually good to well over 95%.
I need control in 10-20nsec slivers. Most uC have serious problems with that kind of granularity. But I wouldn't want that under uC control anyhow because it's a hi-rel app. If the uC goes on the fritz and briefly forgets about the dead-time deal ... tzzzt ... *WHADDABAM*
I've seen a lot negative about Maxim dropping parts making designers shy away from using them in designs. I wonder if the word has ever made it to the head honcho? Seems like an apology and a, we will do different in the future would be in order. Mikek
A transformer gate driver circuit wont work for you?
We did that a few times to drive IGBT's and MOSFETs to isolate things from the HV side.
You need to set the ratio of the xformer to what you need for gate drive voltage.
I used a bi-directional TVS diode as the over voltage clamp.
Depending what you're driving, you may need to remove the (-) volts from the gate for example and use that (-) to drive a PNP so to turn off the gate instead of driving the (-) directly into it.
Just an idea, the TVS is there to help clamp and shape it, I've done it with out it.
Jamie
Looks good to me....
--. | Vb|-------------. | | | | | | .------------. ||--' | | | ||
Why would the main chip get hot if its output is buffered? Heat from charging the bootstrap supply? That doesn't seem like a big deal.
Harry's driver, or a complementary emitter-follower would off-load the high-current.
How much heat would a buffer stage dissipate?
1A charges 2nF to 10V in 20nS, which works out to 4% duty cycle @ 1MHz, not all of which is full dissipation. If an emitter-follower with 2V Vbe drop peak, that's 2W x 2% per BJT = nada.If there's a heat problem, I don't see it.
I like complementary emitter-followers. One SOT-23-6 package across the MOSFET r(g), cheap.
Cheers, James Arthur
That's a problem. You could also drive a resistor with the driver chip, then run it through an isolator, then run a low-side driver from that -- but you'd need to make sure the isolator could handle the dv/dt.
All in all, you're asking quite a lot from a chip that JT didn't design.
Oh, picky picky. You'll probably get that much variation from noise.
The processors that I've used for this have built-in dead time generators. You do have to program them, but most then let you lock the hardware, where it stays set until reset, a specific unlock sequence, or a stray gamma ray.
the irs20124s doesn't charge the bootstrap there's an external diode
-Lasse
They all get a bit hot when run fast. It's because the inner workings and most of all capacitances in the chip have to be sloshed around faster.
If it's big enough, very little. The main concern is always with the external big switcher FETs. There is nothing that can replace low Rdson inside a gate driver, except a driver with even less Rdson.
If you are switching well north of 100V into a heavy load "nada" becomes a lot of heat.
Yeah, but they won't pull much below 1V. My ideal scenario for driving FETs would be a driver that pulls to -10V or so, whambam style.
I just don't get it why mfgs build otherwise well architected drivers such as the IRS20124 with such wimpy output devices.
And I really don't understand how anyone could use IRS as the prefix for a part ... :-)
Noise won't impact that. What is a concern is if the dead-time control would for some reason completely go away.
Hardware-locked dead-time control would be acceptable. Unfortunately we don't have that kind of big uC available in this case.
Good point. So, buffered, IRS20124s heating should be minimal.
Cheers, James Arthur
Please, at 1 MHz? That's nothing.
Right on the driver Rdson, but we've fixed that by buffering.
That's not in the driver though, that's in the switch. The driver only has to swing 10v.
Some of the IR stuff can pull negative, IIRC. We could probably build it into a complementary emitter-follower too, but you'd balk at the parts-count.
Cheers, James Arthur
See the IRS2014 datasheet, figure 33. With a measly 33ohms into a gate it heats up by almost 20C at 400kHz. The marketing blurb at the beginning says "operates up to 1MHz" and then the graphs stop at 400kHz ...
What I meant it that 20nsec is a longish time to slosh stuff around. Faster = better.
Yeah, parts count can't get out of hand too much on this project.
Right, do NOT forget the Miller capacitance. The higher the Vds the worse it gets. While the Cdg is smaller than Cgs, the effect of the large drain voltage swing makes the Miller cap a real bear. And, again, you have to deal with it both at turn-on and turn-off. The I*t of the miller cap can make it dominant over the plain Cgs charging in many configurations. At least IR makes these numbers and charts quite clear in their data sheets.
Not in this case because I need to get well above 90% duty cycle.
I think I'll just use an extra set of driver ICs behind the PWM driver chip. It's sad that one has to do that but, as John Wayne said, man's got to do what man's got to do.
Miller is the other reason why I want more oomph from the driver. I'll never understand why mfgs build gate drivers that can barely do one lone amp of gate current. To me that's useless, in this day and age where everything comes with high efficiency mandates. In high voltage apps the drivers really have to step on it.
But we're not talking about that. Almost all that heating is coming from the part's output stage, easily seen by looking at the successive graphs showing the heating driving heavier and heavier loads.
If the part's output is externally buffered, that drops to nothing.
Faster=no problem. I picked 20nS as a tough case for the driver, dissipation-wise. Harry's brute sources what, 8A? That's faster.
Also, the FET itself will switch a lot faster than the gate swing. So, no worries.
If you really pull hard to 0-ish volts, that's fine. Miller's the reason to go negative Vgs, to prevent d(Vd)/dt from turning the FET back on, but if you hold the gate hard low, that's usually plenty.
A wimpy driver holding the gate low is another matter--that could well backfire on turn-off if the feedback capacitance produces too large a voltage at the driver output.
Cheers, James Arthur
Not really. IME they keep on burning internally to some degree. Also, I simulated it with PNP/NPN buffers similar to the Zetex and it'll still have to do 250-300mA swings. That is roughly the 33ohm case.
I'll look for something slightly bigger but one of the Zetex drivers may suffice.
It's still best to go negative because it overcomes the gate path resistance to some extent. The higher the gate current the better. Up to the tzzzt .. *PHUT* limit, of course.
That is another reason why I detest wimpy drivers.
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