Open loop, so just a shell as I said.
And yes, I could stand to use emitter followers for the drive transformer, or at least more inductance (100 turns per winding would be nice, plus some extra turns on the secondaries). Ah well, the mini choke input snubber is kind of humorous, too.
Tim
-- Deep Fryer: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
Get rid of the large electrolytics in the centre-tap, or lose volt-second balancing.
The 'snubber' on the drive winding serves to short the drive transformer in the 'off' time.
I like the 12V sky-hook.
RL
Whyzat? When power is applied, they charge to half supply voltage (capacitive divider); when running, the operating point is stabilized. Duty cycle is pretty darn close, so I don't expect any drift in output DC voltage.
Yup, works pretty well to short the flyback pulse.
Forgot to draw the 9V transformer, rectifier and capacitor. Big whoop ;-)
Tim
-- Deep Fryer: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
(snip)
Pretty darn close is only good enough if you're prepared to gap the core, limit transient response or attempt some kind of active flux balancing or pulse-by pulse current-mode control. The latter has been touted as being intrinsically unstable in capacitive volt-balancing topologies, though it can be adapted with caution.
The electrolytics are superfluous if your film capacitors are suitably chosen - as film caps will be carrying most switching frequency current anyways - the electrolytics will simply warm up, in sympathy and 'drag' on the balancing action of the film caps.
RL
Bah. If they're off by say, 10V from the overall duty cycle the thing is making, that's all of 20mJ delta E, not even enough to roast a MOSFET junction (unless it's already considerably hot). And that's if the transformer saturates, which isn't likely with an AC drive, even with some amount of momentary DC bias.
Or I could be wrong and it could explode every time in such a situation. I can run the numbers and prove it.
(Err, if the films are carrying the current, then the 'lytics aren't, thus they aren't dissipating power in their ESR..?)
A mere 2uF alone isn't enough at 10A for 10us, and I don't feel like chucking bulkier films (that I don't have in my junk bin) at this, so a rather stiff set of electrolytics seems like a reasonable solution, if slower in event of DC offset.
Incidentially, where does the DC offset come from, anyway? My duty cycle is very well matched, even for very low levels (I checked, at a sliver of gate drive (2-5% duty?) the voltage drifts by like 10V).
Tim
-- Deep Fryer: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
You don't know where it comes from, yet the correctio method used is hunky dory. That's cute.
Depending upon layout, under normal operation, the 494 can be pretty good for matching duty - but you are buffering the 494 through bipolar transistors with no consideration for overdrive and storage. Further, your drive waveform itself is DC-coupled into the drive transformer.
Though fet turn-on time might act to compensate for an AC-coupled input signal that reduces in amplitude for increased drive delays (which this isn't), turn-off time is constant. The only correction mechanism is drive txf saturation and early loss of a drive PW in the overdriven direction. The flux imbalance in the drive transformer is preserved in the off-time short.
Whatever delay or imbalance that hit the mosfet gates will again be added to, or subtracted from, by the mosfet effective on times and their unequal voltage drops.
Unbalanced switching periods and amplitudes require the DC offset to equalize both magnetizing current and load current (the latter is maintained as a DC average by the output inductor). Just which current dominates during any switching period is dependant on load, turns ratio and the ratio between primary magnetizing inductance and the reflected output filter inductance.
Your report of a 10V drift (ie a 20V imbalance in primary switching amplitude) at such a low duty cycle (and, may we suppose only fractional intended load voltage/power/reflected current) would be considered as pretty severe, considering that the ideal primary amplitude is only about 80V. Your 'very well matched' drive has produced time period imbalances of 13%. Admittedly, narrow duty exagerates the effect of simple switching delays.
How long will it take the core to saturate? It depends on the turns and cross-sectional area of ungapped ferrite. A 13% imbalance will walk into saturation, without correction, in 4 full-phase switching cycles, if the designed (and output voltage regulated) AC peak flux is half the saturated limit. Low frequency devices tend to be more core-saturation-limited in their design, than core-loss-limited, so peak design flux may be on the high side, depending on who made the design decision, and why.
How long does it take some 404uF to counteract this imbalance? Well, the higher the magnetizing/load current and the more saturated the medium, of course, the faster it will occur. Assume that magnetizing current is only a fraction of full-rated reflected load current. Your figure is 10A so we'll assume you've ended up with a magnetizing current value of 2A. A 2A imbalance will take 2mSec to change the voltage on 400uF by 10V . How many of your switching cycle periods is that, by the way?......on-time only now......
Ungapped ferrite changes from saturated to unsaturated in a pretty spectacular manner - the difference in current slope can easily be an order of magnitude. Here you are expecting current to change from -2A to +2A and what does it do? It changes from -2A to +22A ; but this is just great, because at this and even higher currents (why should it stop at 22A?) the balance is eventually found much faster!
For a full-load low-line droop in your coupling capacitors of 10%, Your 30KHz switcher, you'd need to increase their capacitance to 4u7 each. This was a common value used in low frequency 400-600W converters in the 80s.
Check out the ESR in 200V electrolytics to fugure out why it might not be such a good idea trying to get them to pass 2.5A (5AppK) each.
Before you ask, be advised that all of these parts act in parallel to pass primary current, if the main bulk rail is a properly bypassed AC short.
RL
Well, it seems you missed the roasty drive they get- those 47 ohm resistors turn off the 440x's pretty nicely, even with the gob of current pushed in. (Risetime is pretty impressive too, I've never seen a 4401 switch in 30ns before. ;-)
Considering the 494 output is pretty symmetrical (I haven't measured it, but I imagine they are within 10ns), the only imbalance I can be adding is due to switch time, which because I'm adding it to high and low side pulses, would be differences in the 440x's themselves, at most 100ns I would guess (I haven't measured switching time variation personally ...see below).
Well, yes, in a manner of speaking. But at some point, magnetizing current always comes to zero. At low duty cycles, the snubber keeps flyback down until it decays; at higher duty, the current is stored by the snubber and reversed in the opposing pulse.
Sure, if voltage or pulse width became unbalanced, it could happen, but pulse width is always symmetrical (within jitter and differences in switching time) because of the 494's flip-flop, and voltage is always symmetrical (within Vsat differences) because it's applied the same way, in reverse, to form the other half. The time integral can't really be nonzero unless something really shitty happens, like a transistor smokes or something, in which case you have a problem anyway.
Yes, 13% is quite good I would say, considering you're using the media-esque exaggeration of trends as ratio when difference is needed.
^^^ Because the MOSFETs won't pull much more than that, actually. I don't remember from testing but the transformer probably won't pull much more than that either, although I test inductors at 15V, not 150V, so that's something of a moot point.
Muh? Re-read that- I said 60kHz. In fact I left the oscillator running and the scope is still warm. Lesse, I count 17us between rising edges, that's
58.8kHz at the MOSFETs. Not bad I'd say since I calculated the frequency from the datasheet RC tables.As long as I'm measurin' stuff, it looks like I can get this thing down to about 100ns pulses (with MOSFETs attached, no power applied). At this level, they're only 4V tall, hardly enough to make a MOSFET conduct. The low side pulse is about 100ns wide and the high side (viewing from the same connection, not necessarily fair) is about 120ns. These pulses have a considerable tail (about as long), but you can't expect much from a 4V twitch, anyway.
At this hair thin level, the MOSFETs would probably be unequally driven (according to their gate thresholds) and also in the linear range (for most loads), limiting current and making saturation a non-issue. Dissipation is also nil since the duty is so low.
I suppose if this were allowed to idle at nearly zero load current then a large load were demanded, a good bit of current could be pulled to correct the voltage imbalance. A good solution would be a load resistor.
For that matter, at realistic duty cycles, rise time is 100ns, voltage remains at +/-10V for however long (0.1-7.6 us by the looks of it), drops about as quickly to about 5V and enters a rather ugly slope to 0V for about a microsecond at the longest (the falling slew rate gets better at higher duty, indicating snubber current pushes it to zero faster; transistor output capacitance perhaps?).
Tail aside, it's my opinion that the driver circuit is working quite well!
Anyways.
Sounds about right.
Yep, that's why I have eight capacitors on there.
Wait, sorry but didn't the film caps carry switching current?
Well, it should be with 840uF (and (+100/-50%) / sqrt(6) = +40/-20% tolerance) on there.
You also haven't seen how I put the better and more numerous caps *right at* the MOSFETs. Hum, I need to grab the USB cable and download some photos. Maybe see if I can get that coat hanger load glowing again for a Vulgar Display of Power (to make a Pantera reference).
Tim
-- Deep Fryer: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
Drive current limit is from the 180R series resistors and the 494 emitter voltage compliance of 2V5, producing 10mA. When forced through
47R resistors, this does not even guarantee turn-on, never mind controlling base current to avoid saturation or desaturation in the on interval,when they do.. There is no off voltage to sweep base charge out of a saturated switch,Mosfets are voltage control devices, and there is no control over this voltage. Your mosfet current is limited by RDSon/HVDC for a first orer approximation of power-transformer-saturated mosfet current limit.
Your schematic labels the oscillator frequency as 60KHz. True, the components placed there produce a fequency that is off of the 494's application chart, where the ~120KHz achieved is less than half the predicted RC formula for the oscillator within it's design range. The oscillator frequency is double the full-wave configuration output.
Some 'A' or 'B' vesions of the 494, and some mfr's more recent 'normal' product can be more predictable at higher frequencies, but these do not use the 494's simple output driver stage.
I don't see this discussion going anywhere fast to improve the performance of the circuit in question, or to advance the stage of your breadboard tests, without some kind of disapointment intervening. Perhaps when you've attempted to close the loop or have popped a few more mosfets, I can be of further (if any) assistance.
RL
Huh?? You can use the emitters as followers. I don't even *know* where you'd get the idea that the emitter only rises 2.5V.
Checking, it goes from 0 to 8V. The collector goes from 12 to 11V.
Incidentially, there's a ~0.6V tail on the emitter output 200ns long -- the storage charge. Why can't you accept that 47 ohms turns off a 2N4401 quickly? LOL
Well, yeah, at 2.5V, this thing certainly would not work, but that is not supported by my detailed descriptions of a waveform that looks right!
Wait, nevermind. Thought I remembered seeing curves much beyond 10A for the thing...
Agreed. I'm trying to get you to see that the circuit is, at the very least, operational. Once you accept that the circuit is in fact working, we can discuss improvements.
Meh, the smoke and flames were my fault. It's a 50A circuit, not an 80A circuit. ;-) Lower Rds FETs would help, and better thermal conductivity would help as much (40W into an ISOWATT case doesn't make it too happy).
Tim
-- Deep Fryer: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
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