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multistage differential amplifier - stability

Dear All,

I have recently worked on a new multistage amplifier and I experience some stability issues where I would be very grateful for some tips. As it is only working in a closed loop debugging the individual stages is difficult due to biasing and high gain.

Input-Stage: => Input is AC coupled. => DC operating point is by the 1Meg bias resistor. => Differential NPN stage with active current mirror load. => Bias current set by N-channel JFET.

Gain-Stage: => PNP transistor for level shifting and gain. => With compensation capacitor.

Output-Stage: => Source-Follower for not loading gain-stage.

Feedback: => By a resistive divider. To avoid an capacitor feedback is to the input DC level.

Problem: => Circuit DC level okay => Not stable and circuit oscillates. Frequency shifts by compensation capacitor => Not depends on output load (capacitive load reduces stability - removed for test)

I also did a spice analysis and the circuit is working. I have uploaded a screenshot of the circuit at

formatting link
Choice of components is based on availability.

If maybe someone could give me some hints I would be very grateful for that.

Thanks, Christian

Reply to
wolti
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So it oscillates in the real world, but is stable in SPICE?

Reply to
bitrex

If it's unconditionally stable in LTSpice but is oscillating in the real world it sounds like it could be a decoupling/layout issue...how are you prototyping it?

Reply to
bitrex

So spice says it's stable? Does it not even ring if you apply a step input? What's it's phase margin? Does your spice model accurately reflect parasitics? Can you make your hardware version stable by reducing the feedback gain? Then do the individual stages behave like the spice model? Are your power supplies and ground clean? What's the input impedance of the driving signal?

HTH...

Reply to
Frank Miles

Tighten up the timestep in LTspice first... LTspice's time-step granularity often misses HF oscillations.

Also: Class-B output may keep loop-gain checks from finding problems. Use a step input transient response to find ringing indicative of stability issues. ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
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| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
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Reply to
Jim Thompson

Hi,

Thanks a lot for the input. I have done a prototype PCB (the components are quite small). Parasitic could be an issue.

Christian

Reply to
wolti

Am Donnerstag, 25. Juni 2015 23:55:49 UTC+2 schrieb Jim Thompson:

some stability issues where I would be very grateful for some tips. As it i s only working in a closed loop debugging the individual stages is difficul t due to biasing and high gain.

e input DC level.

tion capacitor

removed for test)

d a screenshot of the circuit at

formatting link
Choice of compo nents is based on availability.

that.

Dear James, Dear Cassiope,

Thank you all for the valuable input. I will invest some more time in the s pice studies as this is definitely quicker than soldering the miniature SMT components. Especially if I manage to reproduce the same issue in spice it is easier to get an idea where it comes from. I already tested the circuit with the DC supplies exchanged by a voltage source with periodic fast risi ng steps (20V +- 10mV).

Maybe there is also a different method for making the amplifier stable as t he compensation capacitor does not help.

Thanks again, Christian

Reply to
wolti

e some stability issues where I would be very grateful for some tips. As it is only working in a closed loop debugging the individual stages is diffic ult due to biasing and high gain.

the input DC level.

sation capacitor

- removed for test)

ded a screenshot of the circuit at

formatting link
Choice of com ponents is based on availability.

or that.

al

ou

spice studies as this is definitely quicker than soldering the miniature S MT components. Especially if I manage to reproduce the same issue in spice it is easier to get an idea where it comes from. I already tested the circu it with the DC supplies exchanged by a voltage source with periodic fast ri sing steps (20V +- 10mV).

the compensation capacitor does not help.

If a big enough c-e cap doesn't fix it, something other than parasitic capa citance is going on.

Hang on, you've got 2 inverting stages then 2 noninverting :) Oops!

NT

Reply to
tabbypurr

nce some stability issues where I would be very grateful for some tips. As it is only working in a closed loop debugging the individual stages is diff icult due to biasing and high gain.

o the input DC level.

ensation capacitor

ty - removed for test)

oaded a screenshot of the circuit at

formatting link
Choice of c omponents is based on availability.

for that.

real

you

he spice studies as this is definitely quicker than soldering the miniature SMT components. Especially if I manage to reproduce the same issue in spic e it is easier to get an idea where it comes from. I already tested the cir cuit with the DC supplies exchanged by a voltage source with periodic fast rising steps (20V +- 10mV).

as the compensation capacitor does not help.

pacitance is going on.

silly me, fb is to the other input!

NT

Reply to
tabbypurr

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