Multiple signals on single Serial TX line

On a sunny day (Mon, 14 Jan 2013 13:08:08 -0800 (PST)) it happened Klaus Kragelund wrote in :

Old systems used bit 9 as address signal in the serial stream. So when bit 9 was set, the RS232 vale was an address, then followed by data for that addres. In this case with only 2 rx units, setting bit 9 should address the second unit for each data byte, and with bit 9 = 0 address the first unit. Of course this assumes you have control over the UARTs of both units. There are endless variatons on this scheme. I would not add some RF..

115kBaud

to the signal "TX"

time. On the secondary side the HF signal is caught by the advance of a ripple counter (4017). The clock rate is significantly higher than the TX rate and higher than the reset signal, so when the short time slice with many pulses occurs it will set O3 output high for long enough to charge the "OtherSig" capacitor.

simpler idea? (I have looked at a microcontroller to decode the signal, but that takes to much current)

have sketched up quickly has too many parts.

Your problem is kinda vague, but if I make some assumptions.... Is there any way you can embed the data in the parity bit and extract it from the UART parity error flag?

th 115kBaud

barrier

ected to the signal "TX"

short time. On the secondary side the HF signal is caught by the advance of a ripple counter (4017). The clock rate is significantly higher than the T X rate and higher than the reset signal, so when the short time slice with many pulses occurs it will set O3 output high for long enough to charge the "OtherSig" capacitor.

simpler idea? (I have looked at a microcontroller to decode the signal, bu t that takes to much current)

ones I have sketched up quickly has too many parts.

On the primary side (left side), a microcontroller generates the TX signal. It cannot be modified in length or rate, since no intelligent function exi sts on the secondary side. On the secondary side, the TX signal is brought on to a receiver of unknown type, except that it has an UART to receive the data

"Combined Data" is the combination of the TX data from the UART and the spe cial signal (with a periodic HF envelope)

The low-rate signal, also generated by the microcontroller, is used to swit ch on a special circuit on the secondary side. It can be of low rate, updat ed every 1ms is ok. This signal is free to be modified in a way that suppor ts transfer of the special data

Regards

Klaus

115kBaud

barrier

to the signal "TX"

time. On the secondary side the HF signal is caught by the advance of a ripple counter (4017). The clock rate is significantly higher than the TX rate and higher than the reset signal, so when the short time slice with many pulses occurs it will set O3 output high for long enough to charge the "OtherSig" capacitor.

simpler idea? (I have looked at a microcontroller to decode the signal, but that takes to much current)

I have sketched up quickly has too many parts.

The parity bit is a good idea. If all eight bits are being used, perhaps a stop bit could be added for the same purpose.

ith 115kBaud

barrier

fected to the signal "TX"

short time. On the secondary side the HF signal is caught by the advance o f a ripple counter (4017). The clock rate is significantly higher than the TX rate and higher than the reset signal, so when the short time slice with many pulses occurs it will set O3 output high for long enough to charge th e "OtherSig" capacitor.

d simpler idea? (I have looked at a microcontroller to decode the signal, b ut that takes to much current)

e ones I have sketched up quickly has too many parts.

The TX signal must be transparent to the secondary side with the same width and timing, so I am afraid this is not possible, although it is a good ide a for another case.

Cheers

Klaus

The classical way would be to do this with a tone decoder, at several hundred kHz. These are only examples, older models that probably use too much power and have too many external parts for your case:

A second method is to use a PLL chip with lock detect output. It would lock only if the RF signal is present and stable for a certain time and the lock output then becomes your OtherSig line. This may be beneficial if there is EMC concern because you could use an ISM frequency such as

13.56MHz or 27.12MHz.

A third quite unorthodox method would be to use a regenerative circuit that gets pulled in and out of oscillation by the RF signal. This oscillation could then either be detected by rectification or by the difference in current consumption.

--
Regards, Joerg 

http://www.analogconsultants.com/

Nice ideas. The PLL could be done with the 4046, which comes cheap, but not small AFAIR.

Cheers

Klaus

small AFAIR.

The 74HC version comes in TSSOP. Do you need higher voltage on the secondary side?

--
Regards, Joerg 

http://www.analogconsultants.com/

Should be able to cook up a "narrow pulse" detector with some RCs and not too much complexity (maybe a few schmitt triggers?); alternately, detect the "low frequency" data with a missing-pulse detector and AND/OR/XOR the remainder to detect the high frequency stuff.

As far as analog filtering goes, you could make a 25%/75% PWM modulator, keyed by the 115kb/s data; vary a characteristic of the PWM itself to send the extra data. Filter and schmitt trigger recovers the 115kb/s data. To detect the extra data, for example, change it from 25% in the low state to

10% or something. With stop/idle bits, you're guaranteed some minimum amount of zero bits. Alternately, some delayed-synchronous detection scheme might yield better noise margin (not that noise is an issue with an iCoupler and logic level signals).

This is all very NTSC H/Vsync in nature...

Tim

-- Deep Friar: a very philosophical monk. Website:

We are using an Icoupler to transfer TX serial data across a barrier with

115kBaud

I need to transfer a digital signal with low bandwidth across the same barrier

The following link is a initial idea:

The idea is that the TX data runs through pretty much without being affected to the signal "TX"

On the primary side a circuit can inject a high frequency signal for a short time. On the secondary side the HF signal is caught by the advance of a ripple counter (4017). The clock rate is significantly higher than the TX rate and higher than the reset signal, so when the short time slice with many pulses occurs it will set O3 output high for long enough to charge the "OtherSig" capacitor.

On the surface it behaves well, but I perhaps someone has an better and simpler idea? (I have looked at a microcontroller to decode the signal, but that takes to much current)

I may even be that just a glitch detection circuit could do it, but the ones I have sketched up quickly has too many parts.

Regards

Klaus

On a sunny day (Mon, 14 Jan 2013 15:56:13 -0800 (PST)) it happened Klaus Kragelund wrote in :

small AFAIR.

It sucks, because you may not get >= 13MHz through a RS232 cable of any significant length. Then go wireless! And take the other data with it. :-)

small AFAIR.

Max secondary voltage is 3V, so its in the low range.

Right now, I am looking for TinyLogic to see if I can find a counter in that package, but may need to build that using 2 pcs dual Flip flop. (for the original idea with a counter and reset as proposed)

Cheers

Klaus

small AFAIR.

significant length.

THe length of the high speed is max 20mm, the low speed (and RC filtered output) of 115k baud has a long run, but thats using a RS485 driver IC

Cheers

Klaus

On a sunny day (Tue, 15 Jan 2013 04:32:21 -0800 (PST)) it happened Klaus Kragelund wrote in :

small AFAIR.

significant length.

Then simply use an extra wire for the second channel?

using a

Its has been the cable capaciatnce in the past that caused problems fof RS232. If you terminate correctly with RS485 you can send higher frequencies:

Read the top few lines, its shows max speed versus cable length. Of course you can sort of ignore the specs and do it your own way.

I just wonder, for RS232,

serial channel 1 input -> | | max232 PIC max 232 -> new output serial channel 2 input _> |

The PIC reads both data and retransmits for ch1 with bit 9 (sometimes called parity bit) set for ch1, and reset for ch 2.

One the other end of the cable similar but reverse: ------- ch 1 RS232 | max232 PIC max232 | | ------- ch 2 RS232 (or whatever level)

Just plug boxes between existing...

You could also try to find a watchdog chip or re-triggerable one-shot where the time can be set short enough. Should have a Schmitt input.

Then feed its trigger input via a simple bandpass (resonant circuit, resonator, etc.) so it won't react to the occassional transition that comes from your 115kbaud traffic but will react if a carrier on the resonant frequency shows up. SMT-Resonators can be had in very tiny sizes.

--
Regards, Joerg 

http://www.analogconsultants.com/

small AFAIR.

significant length.

CAT 3 telephone wiring is capable of carrying 1-24 Mbit/s several kilometers in DMT modulation (ADSL2+). Within an apartment building, old telephone wiring will carry much more than that in VDSL format.

small AFAIR.

significant length.

DSL RS232

115kBaud

to the signal "TX"

time. On the secondary side the HF signal is caught by the advance of a ripple counter (4017). The clock rate is significantly higher than the TX rate and higher than the reset signal, so when the short time slice with many pulses occurs it will set O3 output high for long enough to charge the "OtherSig" capacitor.

simpler idea? (I have looked at a microcontroller to decode the signal, but that takes to much current)

have sketched up quickly has too many parts.

Take two dual UART PICs or similar. Program one with a 115kbaud UART receiver which copies to a UART transmitter with a faster baud rate, not necessarily standard, whatever works with the clock you have. On the other side of the barrier do the reverse with the other PIC.

Now you have a faster link across the barrier and the world is your whelk. For example, you could use 9-bit mode on high speed transmit/receive to select 'normal' serial or your digital signal. Use digital I/O pin for the digital signal.

Simple code, reliable, cheap.

Cheers

--
Syd

not small AFAIR.

significant length.

The point of stuffing two signals on the same line is to save an optocoupler across the barrier

Cheers

Klaus

Might just do the trick, thanks :-)

Cheers

Klaus