How to remove clock noise on 4017 outputs?

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Looking on the scope at the output pins of a 4017 counter, I can see
noise from the clock. Is this normal, or is my circuit at fault? Here
is the schematic:

http://farm3.static.flickr.com/2781/4179784081_1e1c6a462b_o.png

All timers are 7555 types. (R6 is 68k, not 6.8k as marked.)

I can post a photo of the scope trace if it's useful?

Thanks,
Julian


Re: How to remove clock noise on 4017 outputs?


On Sat, 12 Dec 2009 18:59:10 -0800 (PST), Julian Bunn

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I'll guess this is due to poor layout.
Could be power supply noise.

Some digital circuits can be quite forgiving of poor layout and noise.
But if your circuit has messed up operation then read up on grounding,
and decoupling.


Re: How to remove clock noise on 4017 outputs?


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I'm pretty happy with the level of noise on the power supply. What I'm
seeing is
definitely clock related. See the reply to Ed below for a scope trace.

Re: How to remove clock noise on 4017 outputs?


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   ?? 470pF bypass??

Re: How to remove clock noise on 4017 outputs?


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Vcc to the 555's should be isolated.   D4, R26 and C8 (assuming C8
is 470 uF, not 470 pF) do that for IC1 & IC2, but there is no
isolation shown for IC3. The connection from R15 to pins 4 & 8 of
IC3 should be removed, and replaced by a diode. Than add an
electrolytic from pin 4 & 8 to ground. You can also place a .01 uF
in parallel with the electrolytics.

That's the starting point.  The Vcc connection for the 4017 is not
shown, so it's not clear if IC1 & IC2 supply is isolated from the
4017.

A picture of the scope wavefoprm might be helpful. Does the circuit
do what you want, or is there a problem?

Ed

Re: How to remove clock noise on 4017 outputs?


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Hi Ed,

Thanks for these great ideas. Yes, the circuit does exactly
what I want, but I'm not happy with this clock noise. Here is a scope
trace of the problem:

http://farm3.static.flickr.com/2739/4180939956_3a538a2be9_b.jpg

The lower trace shows the waveform at "Vout" and is a set of voltage
levels from the pots 0-9 for each channel. There are ten levels in
total,
the first pot is set high, the next four are at 0, and the rest are
set to form a staircase. The clock noise is most evident during the
base part (pots 1-4) ... small spikes.

Lower trace is 5V/cm, .2ms/cm

Upper trace is the clock as measured at pin 14 of the 4017.

The 4017 supply is not isolated from IC1 and IC2's.

Yes, C8 is 470uF :-) All components for the HV Osc are on a separate
board. I think I am missing a 470u in the diagram, but it is there.
R15 is decoupling the HV supply. I will do as you suggest for
pins 4/8 on IC3.

Thanks again,
Julian




Re: How to remove clock noise on 4017 outputs?


I want your scope.

Re: How to remove clock noise on 4017 outputs?



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Ha, If that is the scope I think it is, I through out 5
  of those years ago..

   Was getting hard to move them around and find space for them.

   I still may have some tubes from them. :)



Re: How to remove clock noise on 4017 outputs?


On Dec 13, 10:13A0%am, Jamie
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Thanks Jamie ... good suggestions. I intend to investigate further
based on all the advice
I've received and will report back here.

The scope is a Tektronix 556 Dual Beam. It's a monster :-) I have
quite a few older Tek scopes:
http://pcbunn.cacr.caltech.edu/jjb/Tektronix/tektronix.htm

Julian

Re: How to remove clock noise on 4017 outputs?



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That collection is clearly a work of love.

Re: How to remove clock noise on 4017 outputs?


in Message id:

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Ack! I don't!

Re: How to remove clock noise on 4017 outputs?


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Can you attempt to isolate what is causing the problem? Can you remove the
4017 and drive the circuit and see if the outputs have any noise on them? If
so then you know that the noise is coming from somewhere else. If not then
it's the IC, the layout near the idea or a problem with the layout design.
(assuming the noise does not show up on your rails)

I would try to remove 4017 and check noise and disable HV section and check
noise. This would probably narrow down the possibilities drastically.

In this case, if the noise is only on the ouputs then it shouldn't really be
any big deal because of what they are driving.

Are you 100% the outputs of the 4017 are spike free? It may be an artifact
of the ic design. This is my guess. You can check this by making a very
simple test circuit involving the IC. (power it up and add a "clock" signal
and check the outputs.





Re: How to remove clock noise on 4017 outputs?



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I briefly looked at that circuit. It's my guess that you are introducing
  a detector effect when dropping the base down to 0V. Bipolars love to
act as R.F. detectors.

   Have you considered putting a low value R at the output of your clock
? This may corner the square wave a bit to remove the R.F. generation ?

    Looking at your top trace (assuming you have your scope probe
calibrated correctly) I would say its a good place to start.

   P.S.
    The 555 sinks better than it sources, it shows the problem happening
  on the low side which brings me to this conclusion.  Location of this
  added R should be close at the output of the clock. etc..





Re: How to remove clock noise on 4017 outputs?


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Ok!  I'll bet if you scope the Vcc to the 4017 you'll see the
noise.  Isolate the 4017 with a lytic and a .01 and diode as
you did before, and see if that reduces the noise.  If the
noise is still there, you could try bypassing R6 with a
small cap.

I looked at a couple of other things that may bite you,
not related to the noise pulses.
If S3 bounces you may get more than one step per press
of the switch. It should be de-bounced.  Can you rearrange
to have S3 trigger IC4 and have IC4 step the clock?  Also,
I'm not sure on the HV oscillator - seems it's set for a
low frequency, and I'm not sure why you chose that.

By the way, I love your Tek scope page. I'm drooling, and
not because of the balsalmic vinegar!  That 575 restoration
is be-you-ti-ful!!

Ed

Re: How to remove clock noise on 4017 outputs?


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Thanks Ed, and everyone else, for the suggestions. The situation is
now much improved. The noise is not gone, but I reckon I'm on the
law of diminishing returns. I did add a 0.1u cap across the switch
to debounce it a while back, but that was not on the diagram. The
HV oscillator is deliberately at a fairly low frequency to avoid
too much loss in the audio transformer I'm using.

I use a Tek 7834 with plugins normally, but the 556 has much superior
triggering
and trace sharpness, so it's much easier to use, I find. The 575
curve tracer is a nice instrument, but when I got it it had a bad
CRT - I eventually found a replacement.

The next module I'm starting on is a VCO. I'll be posting a question
about that soon, as I'm a little perplexed about the circuit!

Re: How to remove clock noise on 4017 outputs?


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   Keep the resistor; replacing it with a diode seems nonsense - but
adding a bypass is strongly recommended.

Re: How to remove clock noise on 4017 outputs?


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It is the *connection* that is replaced by the diode, not the resistor.

It's not nonsense. The diode prevents discharging the added 'lytic if
the 12 volt line is dragged down by any other part of the circuit.

Ed

Re: How to remove clock noise on 4017 outputs?




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Use the LMC555 (CMOS version) instead of the NE555. Or you can try to
decouple the hell out of the NE555.

Cheers



Re: How to remove clock noise on 4017 outputs?


On Sat, 12 Dec 2009 18:59:10 -0800 (PST), Julian Bunn

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Just for fun, try probing a ground node and see what you get. If you
see the clock noise, then your probe ground lead is probably too long.

Re: How to remove clock noise on 4017 outputs?



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I noticed that your resistor values are quite high, the ones on the "reset"
and "ena" lines of the 4017.  These resistors could not be pulling those
lines down enough and causing a malfunction.  Just a thought.

Shaun




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