Do you mean the green board?
The blue box is the host for a variety of mezzanine boards. It can host two if they don't have tall parts like this pot core.
The host has all the power supplies (including PoE) and uP and FPGA and all that stuff. The CPU is a dual-core Raspberry Pi RP2040, which configures the FPGA at powerup.
John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics
Follow-on thought: While it's true that the outer side of shield in a coil has inductance and capacitance. The geometry is too complicated for easy manual solution, but doesn't seem to be causing much trouble.
Joe
In the end it's John's call. If he's happy with the way it works, that's final.
Jeroen Belleman
Of course it works adequately in production. The misalignment is only going to create a small negative effect, but it is a very obvious failure in quality control.
If you have known what you were doing you would have encouraged your production staff to put the pot cores together correctly. That you didn't is proof positive of ignorant fooling around.
It doesn't degrade the performance much, but it is very visible evidence that you and your production staff don't know enough about what you are doing.
Performance is what really matters, but getting stuff to look right is also important.
The road to hell is paved with good intentions.
Don't mess with stuff you don't understand.
But perhaps not the particular ferrite which would work best.
The thing about transmission line transformers is that the high frequency currents are pretty much confined to the transmission line, so that you can mostly get away with Manganese-Zinc ferrites which are normally only good for good couple of hundred kHz. If you found that Nickel-Zinc ferrites would work better you'd be confined to a smaller range of cores.
Design is often a question of balancing lots of contradictory constraints. It pays to know something about all of them before you commit yourself to a particular volumetric limit.
We should mess with stuff we don't understand. We learn things. And it's fun.
Well, maybe you know everything already and don't approve of fun.
It's not hard to buy a bunch and try them.
This pot core uses about all the volume that we have, and it's a standard size that lots of people make.
John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics
Don't be a jerk. We sell lots of the digital delay generator with the optional high-voltage outputs. It works great.
What are you designing lately?
Nobody has complained about the cosmetics of the pot core gap alignment so far. We test every unit so the random alignment must not matter.
John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics
That's crazy. The gap alignment doesn't affect the output pulses, so why should we control it?
You can worry about stuff like that on things that you design.
John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics
I was wondering: Do you actually use this transformer as a balun? I mean, does the signal go in at one connector and out the other?
Or is it more like a transformer, where you use the core of the coax as one winding and the shield as the other?
Jeroen Belleman
Customers don't tend to open them up and look at the construction.
Nothing much.
It's not just the cosmetics. The random alignment doesn't matter much, but it does make a difference, and you should have got it right.
More to the point, you should care about getting it right. You are being the jerk here.
We are using them as transformers. We drive the shield as the primary and use the inner conductors as the secondary.
The usual config has a high-voltage power supply on one end of the primary and a mosfet (now a GaN fet) slamming the other end to ground, with programmable pulse delay and width.
The sec gives us an isolated pulse out of either polarity.
Since the windings are a transmission line, I guess the length of the line limits how short a pulse we can make.
If we worked in balun mode, we couldn't make long pulses.
John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics
So that your customers can see that you know what you are doing.
I do. Sometimes it makes a bigger difference. Sometimes that can be downright irritating. When I got to rework the weighting system on the Cambridge Instruments GaAs crystal puller, I did all sorts of neat stuff
- including inventing a current mirror variant of the Baxandall class-D oscillator - but the only thing that anybody noticed was that I replaced a uA741 with a part that had a 1/f noise specification, and that meant that the kilowatt or so of RF heating ran continuously at about 30% of its maximum rating, rather than banging off for about minute and banging back on at full throttle for about 30 seconds.
Since operators had to babysit the machine for about a day or so to get their slug of single crystal GaAs, they did notice that.
It might have made a difference to the stress levels within that single slug, but nobody said anything about that.
It's even easier and quicker to look at the data sheets and think about what they tell you.
So you aren't designing for performance, but rather for ease of production.
If they open up our boxes and whine about the pot core alignment, we'll just stop selling to the jerks.
That hasn't happened yet.
Those old 741s had popcorn noise.
John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics
Sure, but a test makes sense. Everybody verifies theories with tests.
To make a product possible. We have a standard enclosure (a nice custom extrusion) and a platform board to hang things on. It makes sense to us to stuff in the biggest transformer that we can. More volt-seconds could make for more customers.
Producibility does matter since we pay the bills by making and selling electronics.
John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics
It would also make sense to take full advantage of the pot core pairs you've bought by mounting them with the gaps aligned.
As you rightly say, skipping this stage doesn't cost you much in inductance. It costs you more in volt seconds. The cross-sectional area of the flux path around the pot core pair should be uniform - the area at the centre of core should be equal the area of the rim. In practice the area of the paths leading from the core to the rim will be a bit higher - nobody is going to make the top and bottom lids conical.
Not lining up the gaps shaves quite a bit off of the cross-sectional area at the joint.
Getting the gaps lined up doesn't make device significantly harder to produce, and it will improve the performance, though it would be difficult to measure the difference.
The critical point is that not doing it produces a very obvious defect, and anybody who witters on about insanely good electronics can't afford that.
Your business model is vanity electronics, selling stuff to people who don't know enough to commission a serious design.
You don't have to be all that expert to know that pot core halves ought to be aligned, so you might be narrowing your market quite a bit.
Popcorn noise is 1/f noise. People worked out where it was coming from fairly early on - if after the uA741 specification was finalised - and improved their processes to reduce it quite a lot, and took to specifying an upper limit in the data sheets.
I was a bit surprised that uA741's being sold in 1987 still had popcorn noise, and speculated that that better op amp chips that had failed their 1/f noise test got sold off as uA741's.
Something like the LTspice file below, I gather? (I omit the common mode admittance of the transmission line and the effect of interwinding capacitance.)
Jeroen Belleman
Version 4 SHEET 1 904 680 WIRE 240 96 64 96 WIRE 384 96 272 96 WIRE 512 96 384 96 WIRE 624 96 592 96 WIRE 240 144 240 96 WIRE 272 144 272 96 WIRE 64 176 64 96 WIRE 64 288 64 256 WIRE 272 320 272 240 WIRE 368 320 272 320 WIRE 512 320 368 320 WIRE 624 320 592 320 WIRE 240 336 240 240 WIRE 240 368 240 336 WIRE 192 384 96 384 WIRE 192 432 96 432 WIRE 96 448 96 432 WIRE 240 480 240 448 WIRE 96 544 96 528 FLAG 64 288 0 FLAG 240 480 0 FLAG 624 96 0 FLAG 96 384 0 FLAG 96 544 0 FLAG 624 320 0 FLAG 384 96 outp FLAG 240 336 D FLAG 368 320 outm SYMBOL voltage 64 160 R0 SYMATTR InstName V1 SYMATTR Value 100 SYMBOL tline 256 192 R90 SYMATTR InstName T1 SYMATTR Value Td=5n Z0=50 SYMBOL sw 240 352 R0 SYMATTR InstName S1 SYMATTR Value myswitch SYMBOL res 496 112 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 0 56 VBottom 2 SYMATTR InstName R1 SYMATTR Value 50 SYMBOL voltage 96 432 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V2 SYMATTR Value PULSE(0 1 1n 1n 1n 15n) SYMBOL res 608 304 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 50 TEXT 296 408 Left 2 !.model myswitch SW(Ron=10m roff=1G Vt=0.5) TEXT 96 48 Left 2 !.tran 50n
That's it. The timing of the OUTP and OUTM nodes is interesting, skewed by the line delay. That makes the differential output goofy.
That effect ceates a mess of tradeoffs.
Adding inductance makes it worse. Nonlinear L, even worse.
John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics
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