We can make up any-old-solution, but it'll probably be wrong for your needs, because we don't know what you need.
If this is a watchdog timer, for instance: you generate a pulse (the 'heartbeat') that indicates normal operation, and if it's absent for too long, flip a 'something happened' latch and light a trouble indicator. So, that can mean a clocked shift register, and at the end of the shift register, if that last bit ever goes high, it disables the clock input so it stays high. Every subsequent heartbeat resets the shift register, so only a five-seconds-without-heartbeat event is indicated. Or, alternately, every subsequent heartbeat resets the shift register UNLESS the last bit is high.
The important part of that, is that the latch indicates a pulse ABSENCE during five seconds, which isn't part of your description. The other important bit, is that the latched output might be cleared by a later pulse, or might not. Again, not part of the description.