Hi, folks:-
There's not a lot of information on the inner workings of PLLs used inside microcontrollers such as SAME70 to generate internal and externally available clocks.
Does anyone happen to know if I can expect the phase relationship between the input clock and output clock to remain constant, or will it vary? (in 4046 terms, is the phase comparator more like type I or type II?)
Thanks for any info.
--sp