t about
ient gain
T (I
age, so
have,
ethan
s a huge
(2002),
imum
art.
ipped".
arate
t region.
by MOSFET or whatever for some micro second. When stable sample the voltage onto a capacitor and turn the pulse off. Wait a looooong time and do it ag ain. The average current is whatever the sample circuit dictates
as DC.
on the reference is sampled by a storage capacitor which holds the referen ce voltage between samples. The source is then turned off and the current i s 0. (except for the 4-5uA for the opamp.
e S/H and how long hold time/period you define
e current consumption, so one would need to reduce the current of the S/H a s much as possible and/or optimize the droop of the sampled voltage, so tha t the entire cycle period is long.
Why? There's an opamp to isolate the Ref load from the sample capacitor...
Regards
Klaus