Low Speed Clock Recovery Chip

Does anyone have any ideas about available chips suitable for clock recovery and data retiming on low speed (40kbps)? All the ones I can find are for Gbps and are not what I am looking for.

The data currently is 4 level ASK with fairly good noise properties.

Any ideas would be much appreciated, I dont really have any thoughts......

Reply to
stevieboy01
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A CD4046/74HC4046 type PLL may do fine, as would a digital PLL clocked at many times 40kHz. How many times depends on maximal time between transitions.

Of some importance is how long a valid data stream can go without any transitions - this obviously depends on encoding, and it directly drives the loop filter optimization. If you're guaranteed a transition at every boundary, simple differentiation and an edge-sensitive phase comparator may do the trick. Beware, though, just because the signal itself may look clean, the differentiated signal may not be!

Tim.

Reply to
Tim Shoppa

Many thanks Tim, will look into this solution.

All the best.

Reply to
stevieboy01

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