little homebrew LDO regulator

I need 1.1 and 1.2 volt rails from available 1.5. Rather than adding yet another regulator to stock, I figured I'd just do it.

The opamp will actually be a dual MC33072, and the fet a dual Zetex SO8.

ftp://jjlarkin.lmi.net/TEM2_LDO.jpg

Maybe R1 could be a little smaller.

John

Version 4 SHEET 1 880 680 WIRE 144 -176 32 -176 WIRE 608 -176 416 -176 WIRE 144 -144 144 -176 WIRE 608 -112 608 -176 WIRE 416 -48 416 -176 WIRE 144 -32 144 -64 WIRE 32 0 32 -176 WIRE 608 0 608 -32 WIRE 0 16 -32 16 WIRE 144 32 64 32 WIRE 192 32 144 32 WIRE 224 32 192 32 WIRE 368 32 304 32 WIRE -144 48 -208 48 WIRE 0 48 -144 48 WIRE 32 80 32 64 WIRE -208 96 -208 48 WIRE -32 144 -32 16 WIRE 80 144 -32 144 WIRE 144 144 144 96 WIRE 144 144 80 144 WIRE 224 144 144 144 WIRE 416 144 416 48 WIRE 416 144 304 144 WIRE 512 144 416 144 WIRE 608 144 512 144 WIRE 416 176 416 144 WIRE 512 176 512 144 WIRE 608 176 608 144 WIRE -208 208 -208 176 WIRE 512 272 512 240 WIRE 416 288 416 240 WIRE 608 288 608 256 WIRE 512 384 512 352 FLAG 144 -32 0 FLAG 32 80 0 FLAG -208 208 0 FLAG 416 288 0 FLAG 608 0 0 FLAG 512 384 0 FLAG 608 288 0 FLAG 608 144 OUT FLAG -144 48 IN FLAG 192 32 AMP FLAG 80 144 FB SYMBOL cap 400 176 R0 SYMATTR InstName C1 SYMATTR Value 3µ SYMBOL cap 496 176 R0 SYMATTR InstName C2 SYMATTR Value 10µ SYMBOL cap 128 32 R0 WINDOW 0 49 42 Left 0 WINDOW 3 50 73 Left 0 SYMATTR InstName C3 SYMATTR Value 1n SYMBOL Opamps\\LT1492 32 -32 R0 WINDOW 0 -76 -33 Left 0 WINDOW 3 -104 3 Left 0 SYMATTR InstName U1 SYMBOL res 320 16 R90 WINDOW 0 -45 59 VBottom 0 WINDOW 3 -36 60 VTop 0 SYMATTR InstName R1 SYMATTR Value 100 SYMBOL res 320 128 R90 WINDOW 0 72 52 VBottom 0 WINDOW 3 78 52 VTop 0 SYMATTR InstName R2 SYMATTR Value 10K SYMBOL nmos 368 -48 R0 SYMATTR InstName M1 SYMATTR Value FDC637AN SYMBOL voltage 608 -128 R0 WINDOW 0 55 39 Left 0 WINDOW 3 53 82 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 1.5 SYMBOL voltage -208 80 R0 WINDOW 3 -161 182 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PULSE(1.1 1.15 100u 0 0 200u) SYMATTR InstName V2 SYMBOL voltage 144 -160 R0 WINDOW 0 61 23 Left 0 WINDOW 3 60 60 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value 12 SYMBOL res 592 160 R0 WINDOW 0 58 43 Left 0 WINDOW 3 64 76 Left 0 SYMATTR InstName R3 SYMATTR Value 1 SYMBOL res 496 256 R0 WINDOW 0 47 62 Left 0 WINDOW 3 41 98 Left 0 SYMATTR InstName R4 SYMATTR Value 0.05 TEXT 88 288 Left 0 !.tran 0.001 TEXT -456 -136 Left 0 ;TEM2 LDO REGULATORS TEXT -416 -88 Left 0 ;JL Sep 12 2011

Reply to
John Larkin
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I was about to say, "That's some FET!". Until I noticed you were driving the opamp from 12 volts.

George H.

Reply to
George Herold

+12 is available, and that lets the output fet work in source-follower mode. Most LDOs use p-type outputs, which have worse dynamics.

John

Reply to
John Larkin

Looks good. The output looks a bit prettier with 1.5n for C3. Probably will need adjusting for the final components, though.

John S

Reply to
John S

C3, R2, and to a small extent R1 tune the loop dynamics. It also depends on the load current and the load capacitance and ESR. What's here looks OK so far, actually close to my first-guess values.

The load is mostly the PCI Express side of an FPGA, and the Pericom PCIe equalizer chips. I can envision low quiescent current mixed with blasts of load current as packets get processed. The actual magnitudes are guesswork at this point. At least it's tunable.

Maybe I should add some keep-alive/current dump resistors on the output, just in case the idle load current is very low. And maybe some way to measure the currents, like a few milliohms of PCB trace in the drains. That would be interesting.

We have 99 different voltage regulators in inventory. I didn't want to be the guy to make it 100.

John

Reply to
John Larkin

On 9/12/2011 1:44 PM, John Larkin wrote:

It does.

Maybe you would be interested in impulse loading, then? Try out your modified netlist below to see if it is still acceptable to you.

Horrors! You might become infamous!

Version 4 SHEET 1 1344 680 WIRE 144 -176 32 -176 WIRE 608 -176 416 -176 WIRE 144 -144 144 -176 WIRE 608 -112 608 -176 WIRE 416 -48 416 -176 WIRE 144 -32 144 -64 WIRE 32 0 32 -176 WIRE 608 0 608 -32 WIRE 0 16 -32 16 WIRE 144 32 64 32 WIRE 192 32 144 32 WIRE 224 32 192 32 WIRE 368 32 304 32 WIRE -144 48 -208 48 WIRE 0 48 -144 48 WIRE 32 80 32 64 WIRE -208 96 -208 48 WIRE -32 144 -32 16 WIRE 80 144 -32 144 WIRE 144 144 144 96 WIRE 144 144 80 144 WIRE 224 144 144 144 WIRE 336 144 304 144 WIRE 416 144 416 48 WIRE 416 144 336 144 WIRE 512 144 416 144 WIRE 608 144 512 144 WIRE 416 176 416 144 WIRE 512 176 512 144 WIRE 608 176 608 144 WIRE 336 192 336 144 WIRE -208 208 -208 176 WIRE 512 272 512 240 WIRE 416 288 416 240 WIRE 608 288 608 256 WIRE 688 288 608 288 WIRE 336 304 336 272 WIRE 688 304 688 288 WIRE 848 320 736 320 WIRE 848 336 848 320 WIRE 768 368 736 368 WIRE 512 384 512 352 WIRE 768 384 768 368 WIRE 688 400 688 384 WIRE 848 448 848 416 FLAG 144 -32 0 FLAG 32 80 0 FLAG -208 208 0 FLAG 416 288 0 FLAG 608 0 0 FLAG 512 384 0 FLAG 688 400 0 FLAG 608 144 OUT FLAG -144 48 IN FLAG 192 32 AMP FLAG 80 144 FB FLAG 336 304 0 FLAG 848 448 0 FLAG 768 384 0 SYMBOL cap 400 176 R0 SYMATTR InstName C1 SYMATTR Value 3µ SYMBOL cap 496 176 R0 SYMATTR InstName C2 SYMATTR Value 10µ SYMBOL cap 128 32 R0 WINDOW 0 49 42 Left 0 WINDOW 3 50 73 Left 0 SYMATTR InstName C3 SYMATTR Value 1.5n SYMBOL Opamps\\LT1492 32 -32 R0 WINDOW 0 -76 -33 Left 0 WINDOW 3 -104 3 Left 0 SYMATTR InstName U1 SYMBOL res 320 16 R90 WINDOW 0 -45 59 VBottom 0 WINDOW 3 -36 60 VTop 0 SYMATTR InstName R1 SYMATTR Value 100 SYMBOL res 320 128 R90 WINDOW 0 72 52 VBottom 0 WINDOW 3 78 52 VTop 0 SYMATTR InstName R2 SYMATTR Value 10k SYMBOL nmos 368 -48 R0 SYMATTR InstName M1 SYMATTR Value FDC637AN SYMBOL voltage 608 -128 R0 WINDOW 0 55 39 Left 0 WINDOW 3 53 82 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 1.5 SYMBOL voltage -208 80 R0 WINDOW 3 -161 182 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PULSE(1.1 1.15 100u 0 0 200u) SYMATTR InstName V2 SYMBOL voltage 144 -160 R0 WINDOW 0 61 23 Left 0 WINDOW 3 60 60 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value 12 SYMBOL res 592 160 R0 WINDOW 0 58 43 Left 0 WINDOW 3 64 76 Left 0 SYMATTR InstName R3 SYMATTR Value .001 SYMBOL res 496 256 R0 WINDOW 0 47 62 Left 0 WINDOW 3 41 98 Left 0 SYMATTR InstName R4 SYMATTR Value 0.05 SYMBOL res 320 176 R0 SYMATTR InstName R5 SYMATTR Value 100 SYMBOL sw 688 400 R180 WINDOW 3 32 -11 Left 0 SYMATTR InstName S1 SYMATTR Value MYSW SYMBOL voltage 848 320 R0 WINDOW 3 -161 182 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR Value PULSE(0 1 500u 10n 10n 200u) SYMATTR InstName V4 TEXT 88 288 Left 0 !.tran 0.0012 TEXT -456 -136 Left 0 ;TEM2 LDO REGULATORS TEXT -416 -88 Left 0 ;JL Sep 12 2011 TEXT 712 288 Left 0 !.model MYSW SW(Ron=1 Roff=1Meg Vt=.5)

Reply to
John S

Yes, that's interesting. Bumping just the reference shows damping but isn't as big a shock as a big step load. Bumping the ref has a feed-forward effect, too.

It would probably be prudent to add a lot more output capacitance, a

120 uF polymer alum maybe. Or 100 uF of ceramics. And a dump resistor on the output, too. I have no idea how nasty my load transients will be, but they might be bad.

Thanks. It always helps to have another set of eyeballs on a thing like this.

John

Reply to
John Larkin

I know. I wish I had more eyeballs on my projects. I'm glad it was helpful to you.

John S

Reply to
John S

BTW, John, there are ways to set up the load switch so that it transitions smoothly between on and off if that is what you need. If I can help in any way, let me know.

John S

Reply to
John S

Larkin always cheats ;-) ...Jim Thompson

--
                  [On the Road, in New York]

| James E.Thompson, CTO                            |    mens     |
 Click to see the full signature
Reply to
Jim Thompson

how is that cheating ?

not much different from something like this:

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asheet/3025fd.pdf

-Lasse

Reply to
langwadt

Using an available power supply is cheating?

Show us how you would do a multi-amp 1.5 to 1.1 LDO with no extra supplies.

This idiot killfiles me and hangs on everything I post. Hasn't the guts to talk to me directly, just lurks and pecks from his hiding place in the bushes. Well, old hens aren't noted for having guts.

John

Reply to
John Larkin

So you're giving him credit for knowing how to cheat? I see..

What ever works, I say.

Jamie

Reply to
Jamie

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I don't see the point. Why not just buck it down?

Reply to
krw

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Dropping 1.5 to 1.2 and 1.1, a linear is as efficient as a switcher!

John

Reply to
John Larkin

Make sure the FET can tolerate +12 on the gate.

Mark

Reply to
Mark

Technically, that is high drop out regulator. (HDO?)

A source follower should always be better than a P-fet pass device. Maybe a little gate to ground capacitance would be a good idea. Help the regulator at frequencies where the op amp has no gain.

Reply to
miso

"John Larkin" wrote in message news: snipped-for-privacy@4ax.com...

There's no Over current or Over voltage protection. I personally wouldn't use it as is.

Cheers

Reply to
Martin Riddle

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But it's dropping from 3V to 4V (1x LiIon or 3x NiMH) down to 1.2V, with a

1.5V buck at the front end already.
Reply to
krw

What's the definition of LDO? I'd think that anything below a junction drop might qualify.

Depends on the fet transconductance I guess. The open-loop output impedance is 1/Gm, which goes down at higher currents.

We're going to do a test on an eval board to see how bad the load transients are. I'm not sure if PCIe idles between packets with an

8b10b data pattern on all the lanes, or shuts down. If it idles with data, power drain should be pretty steady.

John

Reply to
John Larkin

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