Design a transimpedance amplifier

You can't go wrong with" "Building Electro-Optical Systems: Making It all Work", 2nd Edition by Philip C. D. Hobbs

And you also need:

The Art of Electronics, 3rd Edition by Paul Horowitz and Winfield Hill

If you bias the noninverting input of the first stage at +4V or something, you can work down from there, and use an inverting second stage to fix the offset.

Avalanche PDs need more attention to their bias than that, because their gain is a strong function of both bias voltage ant temperature.

Cheers

Phil Hobbs

How about a PNP cascode with base at +5?

Then maybe just a resistor to ground. Maybe a resistor and a small inductor to peak things up a bit.

APDs are not beginner projects.

Hi John Larkin, thanks for your reply. but how about using opamp itself than PNP..? (Am worrying about the input noise current/ bias current in case of PNP) As Dr.Phil said, probably I can use a non-inverting opamp but need to bias it carefully and need to think of temperature issue as well... and wondering how can I restore the dc in the next couple of stages(HPF and LPF)

Look back in this newsgroup to the post by T Obulesu from August 7 and some of the replies should help your present query too.

piglet

pedance amplifier to detect low currents of the APD ranging from 0 to 15uA. .

hallenges and brought me here..

rk current, R=0.9 with gain multiplication factor,20....

ut terminal of the opamp...

equired bandwidth is 1MHz...... Can I ask why the opamp has to be single supply? Could you add a -5 volt rail to the design? I'm thinking run the opamp from gnd to -5V... But then for a good zero the SS opamp has to run near it's positive rail... I don't know if they are designed to do that.

George H.

voltage?

in inverting configuration but DC level was keep varying. How can I use an inverting configuration for this

ply opamps and use Sallenkey topology- purpose is to limit the bandwidth st rictly to the 80kHz to 1MHz)..so I can either distribute the overall gain o r a single stage does the job...

The PNP should be pretty good. A high-beta part won't have much base current, hence low noise. APDs are already noisy, so you may well get away with the small PNP noise and the Johnson noise of the resistor.

If the analog supply is limited to 5, the feedback resistor of a regular TIA is limited. So move that same resistor to before the opamp.

If you do it the way I suggest here, a lot of problems go away. Of course, rrio opamps can't actually work fully rail to rail, but that's a problem in any topology. One could add a bit of standing current in the PNP, which would keep the PNP on a bit and also pull the opamp off the ground rail.

A negative power supply would help, too.

A true TIA might be a bit faster, but the PNP collector capacitance could be far below the pd capacitance, so that buys back some bandwidth. Dr Phil is a great fan of cascodes.

What works best depends on your specific needs, so you might do some math or simulation to see what happens. I will cheerfully suggest circuits and let you do the work.

You should really get Phil's book.

Thanks a lot for your solution, John Larkin . I will just go through few maths and simulations using the same circuit..

Yup. The noise power is M**2 times larger than the calculated shot noise of the detected photocurrent, so you can reduce the load resistance by a factor of M**2 without hitting the Johnson noise limit. Real APDs have additional noise sources besides multiplication.

The PNP thing should work fine as long as it has enough bias at zero photocurrent. Of course that extra bias has to come from somewhere, and has to be subtracted off afterwards. (That grounded-base PNP is a great level shifter in lots of applications--I don't think I've ever used it in a single-supply circuit, but there's always a first time.)

At 15 pF, 15 uA FS, and 1 MHz, an op amp will also work fine, and it may be easier to get rid of the offset accurately.

Cheers

Phil Hobbs

Meanwhile, I just used an online design tool from the analog devices..

and simulated the same using LTSpice... I wonder why the result is not following my maths...Of course I have to consider the offset voltage as well yet..another doubt I have is.. if the two inputs of the opamp are tied to the ground, what would be the output of the opamp? the simulation shows it is Vcc/2 incase of single supply opamp... How it is correct? I really don't know where did I made a mistake.. Attached file shows the schematic I used (provided by analog devices tool)and LTSpice file aswell..

No. If your Spice ideal opamp has zero input offset, it would settle to Vcc/2 (or something) with the inputs shorted. Any real opamp would have some plus or minus offset, so most will rail their outputs.

On Sun, 28 Aug 2016 11:04:55 -0700 (PDT), Intruder T wrote:

Google wants me to sign in, which I refuse to do. Google is evil.

You can paste an LT Spice program inline, into a post here. Like this:

Version 4 SHEET 1 1344 680 WIRE 144 -176 32 -176 WIRE 608 -176 416 -176 WIRE 144 -144 144 -176 WIRE 608 -112 608 -176 WIRE 416 -48 416 -176 WIRE 144 -32 144 -64 WIRE 32 0 32 -176 WIRE 608 0 608 -32 WIRE 0 16 -32 16 WIRE 144 32 64 32 WIRE 192 32 144 32 WIRE 224 32 192 32 WIRE 368 32 304 32 WIRE -144 48 -208 48 WIRE 0 48 -144 48 WIRE 32 80 32 64 WIRE -208 96 -208 48 WIRE -32 144 -32 16 WIRE 80 144 -32 144 WIRE 144 144 144 96 WIRE 144 144 80 144 WIRE 224 144 144 144 WIRE 336 144 304 144 WIRE 416 144 416 48 WIRE 416 144 336 144 WIRE 512 144 416 144 WIRE 608 144 512 144 WIRE 416 176 416 144 WIRE 512 176 512 144 WIRE 608 176 608 144 WIRE 336 192 336 144 WIRE -208 208 -208 176 WIRE 512 272 512 240 WIRE 416 288 416 240 WIRE 608 288 608 256 WIRE 688 288 608 288 WIRE 336 304 336 272 WIRE 688 304 688 288 WIRE 848 320 736 320 WIRE 848 336 848 320 WIRE 768 368 736 368 WIRE 512 384 512 352 WIRE 768 384 768 368 WIRE 688 400 688 384 WIRE 848 448 848 416 FLAG 144 -32 0 FLAG 32 80 0 FLAG -208 208 0 FLAG 416 288 0 FLAG 608 0 0 FLAG 512 384 0 FLAG 688 400 0 FLAG 608 144 OUT FLAG -144 48 IN FLAG 192 32 AMP FLAG 80 144 FB FLAG 336 304 0 FLAG 848 448 0 FLAG 768 384 0 SYMBOL cap 400 176 R0 SYMATTR InstName C1

SYMBOL cap 496 176 R0 SYMATTR InstName C2

SYMBOL cap 128 32 R0 WINDOW 0 49 42 Left 2 WINDOW 3 50 73 Left 2 SYMATTR InstName C3 SYMATTR Value 1.5n SYMBOL Opamps\\LT1492 32 -32 R0 WINDOW 0 -76 -33 Left 2 WINDOW 3 -104 3 Left 2 SYMATTR InstName U1 SYMBOL res 320 16 R90 WINDOW 0 -45 59 VBottom 2 WINDOW 3 -36 60 VTop 2 SYMATTR InstName R1 SYMATTR Value 100 SYMBOL res 320 128 R90 WINDOW 0 72 52 VBottom 2 WINDOW 3 78 52 VTop 2 SYMATTR InstName R2 SYMATTR Value 1k SYMBOL nmos 368 -48 R0 SYMATTR InstName M1 SYMATTR Value FDC637AN SYMBOL voltage 608 -128 R0 WINDOW 0 55 39 Left 2 WINDOW 3 53 82 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 1.5 SYMBOL voltage -208 80 R0 WINDOW 3 -161 182 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR Value PULSE(1.1 1.1 100u 0 0 200u) SYMATTR InstName V2 SYMBOL voltage 144 -160 R0 WINDOW 0 61 23 Left 2 WINDOW 3 60 60 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value 12 SYMBOL res 592 160 R0 WINDOW 0 58 43 Left 2 WINDOW 3 64 76 Left 2 SYMATTR InstName R3 SYMATTR Value .001 SYMBOL res 496 256 R0 WINDOW 0 47 62 Left 2 WINDOW 3 41 98 Left 2 SYMATTR InstName R4 SYMATTR Value 0.02 SYMBOL res 320 176 R0 SYMATTR InstName R5 SYMATTR Value 10 SYMBOL sw 688 400 R180 WINDOW 3 32 -11 Left 2 SYMATTR Value MYSW SYMATTR InstName S1 SYMBOL voltage 848 320 R0 WINDOW 3 -161 182 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR Value PULSE(0 1 500u 10n 10n 200u) SYMATTR InstName V4 TEXT 88 288 Left 2 !.tran 0.0012 TEXT -456 -136 Left 2 ;TEM2 LDO REGULATORS TEXT -416 -88 Left 2 ;JL Sep 12 2011 TEXT 712 288 Left 2 !.model MYSW SW(Ron=1 Roff=1Meg Vt=.5)

Just be careful to fix any long lines that might get wrapped in posting.

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to consider the offset voltage as well yet..another doubt I have is..

the output of the opamp? the simulation shows it is Vcc/2 incase of singl e supply opamp...

tool)and LTSpice file aswell..

Do you mean for all three supplies to be the values shown?

The APD only sees 23 volts. I assume that the APD supply will have to be tuned in real life to tweak the avalanche gain.

The opamp can have +-1.5 mv of input offset, and the output can only swing to within about 10 mv of the rails, so it could be railed at low PD current. It's also running out of its "fet-mode" common-mode range. AD8065 is tricky: its input is a mixture of jfet and bipolar parts, with different common-modes.

Dropping Vref to, say, +4 fixes most of that, but your output is still referenced to Vref.

I gotta go make coffee and clean some windows.

Hopefully not Windows 10!

Heaven forbid.

I do have to rework my cabin automation system, which uses XP. Dropbox has decided that their app will no longer work on XP, effective today. I can't imagine why they would decide to do that.