Idea for SPI problem

If your boards are already built with just a single /SS coming out of the master and one /SS going into each slave, all is not lost. You'll need to do a bit more programming, though.

The SPI slaves should be able to safely receive in parallel. The details of how to set up "receive only mode" are chip specific, of course. But then, when a slave sees its address in the SPI packet header, it can turn on its output and continue the conversation with the master. Again, the details are chip specific -- does the master need a delay, should it toggle /SS again, etc.

Yes they are built on this way. Btw. I found this...

What do you think?

I try your suggestion but it's not working.. Maybe some other idea ?

Please define "not working".

What does your code look like ? More details on the boards would help.

Then you didn't do it right?

The hardware solution is to have the master control a unique /SS for each connected SPI device. This can be done using multiple discrete pins from the master with one routed to each selected slave, or by means of an address decoder. The addressing can be done on the master with multiple /SS lines sent out, or on the slaves with all slaves receiving the same set of address lines and each responsible for decoding the hardware address.

Doing it in hardware will probably require changes to the existing boards. I can't guess how you would do that, knowing nothing about your hardware. Have any spare pins? Connectors? Making the software protocol "smarter" avoids hardware changes but, again, I know nothing about your setup and so can only offer general approaches.

First you need to tell us what you mean by SPI, there is a million variations, three wire, four wire, etc..

-Lasse

Unless you are a programming god, you did not try long enough to know whether it will work or not.

And if you are a programming god, you would not be asking in the first place.

Therefor, you haven't tried long enough.

Have you verified whether or not you can turn the SPI output pins off? What processor are you using?

An alternative, if the SPI outputs can't be turned off and if the cable runs aren't too long, is to daisy-chain the slave boards and run a common clock. You still need software smarts to know to pass the data through and not act on it, of course.

Ah yes. That didn't spring to mind, which is sad considering how often I bang on chips with JTAG interfaces. Getting old(er)...