hints for design of a DDS?

The $28 AD9956 has a fast phase detector in it as well as the DDS, so it's easy to do the multiplication (you just need a VCO). As a bonus, you can set the loop bandwidth to be anything you like.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net

How same?

You could get one of those any-frequency VCXO things (Fox, Sitime, others) and modulate it. Cheap, easy, low power.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com

so you are doing diversity Tx?

and you are distributing the audio to the various Tx's digitally?

Right!

I would like to have the different units remain within 0.1 Hz all the time, so about 0.0002 PPM, when the reference frequency is the same. This is comparable to the actual accuracy of the reference.

g

so even if you had 2 identical FM modulators, the signals will still be a b it out of step at the Rx due to the different path delays of the common aud io to the Txs and the Tx's to the Rx. So there can still be beats during m odulation. I don't know how much of a problem this is in practice. Do you ?

This is an interesting system.

Is it for a ham repeater?

you could use GPS to get them exact, but the keeping the modulation identical is the difficult part as you are aware.

Yes. In fact, it is already in operation. We have 3 co-channel diversity repeater systems in our country (the Netherlands), and two of them are operated by a group of which I am a member. These are operating on 2 meters (PI3UTR) and on 70cm (PI2NOS). Due to antennas that we can share, the latter one is the most widely deployed. It has 3 transmitters on high TV towers (a 4th site to be added soon) and 18 receivers.

At the moment we use (surplus) professional repeater base stations, the Spectra MX800. They are locked to GPSDO reference (10 MHz) but internally they use a dual-modulus synthesizer (analog PLL) with the FM modulation applied to the VCO control voltage. This leads to distortion of the audio because the PLL is always trying to nullify the modulation, and the characteristics of this loop are always different between units it seems.

I developed software to output the digital audio that is being distributed over an IP network as analog audio from a PC soundcard with precise timing. Packets of audio are being sent around (UDP) with a timestamp indicating the moment they should be transmitted. The PC is synchronized to PPS from the GPSDO and keeps time to within 1us. Audio between sites is within 10-15us when measured remotely and subtracting the path difference.

However, the deviation setting is of course very critical. It is no problem to get the unmodulated carrier frequency of the transmitters to within 0.1 Hz or so, but once modulated there are larger differences.

I am considering replacing the exciter part of the MX800 with a DDS to have at least the same transmit signal on all sites. As you rightly point out, there is always the problem of path delays, but my software allows to insert a fixed delay on each site, and we tweak the delays so the signal arrives well timed in the area of overlap between two transmitters.

The problem of intermodulation beats is most noticable when there are fixed sinewaves on the output. We already have removed the CTCSS tone on the output as it caused a "raw" voice because of the intermod, and the CW ID and courtesy tone also sound weird in overlap areas. Voice quality starts to suffer only when the interference is really bad. Someone has done simulation with GNU Radio to predict how it will work in ideal circumstances and with all kinds of imperfections, and it explains what we are seeing.

We'd like to improve the quality, but as it is now it already works quite well for mobile stations. Fixed stations with omni antennas sometimes have issues, but mobiles usually have enough shading to mainly receive only one transmitter.

The modulation index is the peak phase deviation in radians, and is also the ratio of delta_f to f_mod.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net

Do I understand correctly that the VCO i used as the DDS clock and the DDS output (typically set to generate 1 or 10 MHz XTAL or rubidium reference frequency) and the frequency error between the DDS output and reference is then used to drive the VCO ? At least this would help solve the Nyquist issue.

It's a combination DDS/PLL synthesizer. The usual thing is to run the synth as a multiplier referenced to the DDS output, working from a fixed reference clock. You can run it inside out if you like.

It's a pretty nice part for the price. It hardly costs more than the version with no PLL, so I've tentatively standardized on it. (My project that I needed it for went away, unfortunately, due to the crash in the semiconductor equipment market last year.)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 

hobbs at electrooptical dot net 
http://electrooptical.net

Spurs every 200Mhz or so, and at other spots, needs a good filter.

--
This email has not been checked by half-arsed antivirus software

This is characteristic for any digital synthesis. It needs a lowpass at minimum, but for my application I can easily add a bandpass of a few MHz wide as the frequency is always the same. A bandpass of channel width is not practical at 430 MHz, that would require a lower IF and analog mixing upward.

Have you considered using an FPGA and DAC with an analog upconverter? You can work at say a 50 MHz sample rate and use a 10.7 MHz carrier. This can be generated very easily by an NCO while being modulated with the FM signal. The sample rate and carrier frequency can be increased to make the up conversion easier. I think a practical upper limit is in the low 100's of MHz and with maximum effort perhaps as high as 500 MHz. There seem to be plenty of DACs at these sample rates.

At the higher frequencies I believe it would be relatively easy to implement the up conversion to 430 MHz.

Some people don't fully understand DDS and think there is an inherent problem phase truncation. This is actually a limitation in the input of the sine wave generator rather than anything inherent in the phase generation. Phase truncation distortion can be reduced to virtually any number you need and can be less than the inherent limitations of the DAC and analog circuits.

I would use an FPGA with a circuit like the below diagram...

+------+ | | Ref Clock ---->| PLL |-------+----------+----------+ | | | | | +------+ | | | Digital V V V Audio -----+ +------+ +-----+ +-----+ +-----+ | | | | | | | | | Filter +-->| Step | |Phase| | Sine| | | +------+ | Size |--->| |--->| |--->| DAC |--> and | | +-->| Adder| |Accum| | Gen | | | | Phase| | | | | | | | | | Up Conv | Step |--+ +------+ +-----+ +-----+ +-----+ | Size | | | +------+

The phase step size determines the carrier frequency. The modulation deviation is determined by the size of the digital audio and the freq/lsb of the phase accumulator. This can be scaled by adjusting the audio magnitude or by selecting an appropriate sample clock rate or by adjusting the modulus of the phase accumulator. Factor of two adjustments are just 1 bit shifts.

The distortion in the digital circuits is minimized by maintaining data word widths. In the sine generator a LUT may work or may be too limiting because of the phase truncation. One of several math based sine generators will give as much resolution as is required.

This architecture in an FPGA allows for many additions such as up sampling the audio and filtering.

Also, don't believe the many bad things you have heard about how hard FPGAs are to work with. As Mark Twain said, "The reports of my death have been greatly exaggerated". So too the reports of how hard FPGAs are to use.

--

Rick C

Unfortunately that means that the upconverter mixing frequency has to be just as precise, so it would require another PLL from the reference frequency. It seems easier to generate a low frequency with the DDS and then multiply instead of mix it up. The DDS output already contains the harmonics, they just need to be filtered. Alternatively, an analog PLL could be locked to the DDS output, with a fixed multiplification.

Others have suggested the AD9956 which contains the above and more. (the divider/phase comparator of a PLL is also included) Its DDS operates at 400MSPS so it should be possible to generate

430/3 (143) or 430/4 (107) MHz and multiply it to the final frequency.

The modulation is something I need to study. Those AD chips have support for modulation, but it comes in the form of registers holding phase shifts (values added to the phase step in the main frequency register), with some data input selecting which register to use. I.e. the intention is to use this for PSK modulation of a single or a few bits. I want to modulate analog voice, it has to be determined if the momentary value of the voice samples can just be written into such a register (using the same register all the time), or if there is more to it.

Advantage of using an FPGA is that I have more functions to implement on this unit, and they could be combined in the same FPGA. The audio samples come in blocks with a timestamp header, and have to be sent to the modulator timed to that timestamp. For this, there is a one-pulse-per-second signal from which the timing is to be determined. (and additional coarse timing information supplied by the PC)

I also need to find a connection method between the PC and this extra unit, which has to transport the sample blocks and the time information, plus maybe other control. It could be USB, for example. Or ethernet, but that is probably too complicated.

A PLL is hard?

I've always thought of filtering as hard. I take it spurs are not significant in your application?

The phase step determines the frequency. Changing the phase step in real time results in FM. You need to update the register as frequently as desired to minimize distortion. That why I pointed out in the FPGA you could up sample the digital audio to match the NCO sampling frequency.

Yeah, that's what I said.

I've never really understood how time stamps could be used easily. It has always seemed easier to me to just count the digital delays in the system and calibrate the analog delays. The time stamp doesn't start until the digital domain, so how do you deal with analog delays. Or is the 1 PPS embedded in the signal somehow?

Both require a processor or a chip with a processor in it. So to me it's 6 of one or half dozen of the other. You can get FPGAs with internal processors which support both but I find the tools to not be up to par with an external processor. I think the real question is which is easier to integrate into the system or for the user. I've heard of Ethernet based systems that use a fixed IP address which lives unhappily in DHCP based systems. Others just cuss USB based system in general (plug and pray). Choose your poison.

--

Rick C

al

ce

rs

you might be able to skip the up conversion and just pick a higher image with a bandpass instead of a lowpass

Some DACs like ad9780 have different output modes to favor different images

-Lasse

It is an extra part of the circuit that would not be required when multiplying instead of mixing.

Spurs are *very* important. In fact they are one of the main decision criteria when choosing one solution or the other. This is for a radio transmitter, not a clock generator or similar.

Ok that is a good point. Interpolating the audio should be a good thing to reduce spurious sidebands.

The 1 PPS arrives as a separate signal from the GPSDO. The digital delay cannot be calibrated as the samples are sent over the internet. At some place in the system they must be re-aligned to precise timing. Now this is happening in the PC, but (part of) it could be moved to the new device.

When using ethernet, it is not mandatory to use IP. Another protocol could be used to forward the frames received from the internet by the local PC to the board, with only simple ethernet headers. Similar for USB.

Exactly when will the phase *not* wrap?

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Rick C