f a RF receiver I'm designing. This stage will have a single-ended output a nd will drive an ADC that has a SFDR of 100 dB. Of course, I need a highly linear amplifier to prevent washing out my ADC performance, but I don't wan t to use one with differential I/O, which is typically used to drive high-p erformance ADCs. I would prefer something simple, like a gain block that wo uld reduce my parts count. The frequency range of my output is 2 MHz to 50 MHz, which is too low for most RF gain blocks' optimal frequency range. My goal is to drive 2.5 vpp, while preventing distortion that kills the SFDR o f my ADC. A gain of 15 dB to 30 dB is acceptable. Any suggestions?
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tial amplifier. I was hoping I could meet my goal using some single ended o ptions. Anyway, I'll be using a diff amp that was designed to drive my ADC, which is a LTC2217 from Linear Tech. I'll be using the LTC6401-26 diff amp .
ata at the max ADC clock rate and doing a frequency spectrum calculation (t ypically with a FFT). You will see that 100 dB SFDR can be attained with a
16-bit ADC, even if the ENOB is less than 16-bits.Suggestion, read the spec's on those parts you listed.
If you're trying to get 100dB out of them @ 50MHz, with your state Vo, the spec's say otherwise.
OIP of the amp and SFDR of the A/D won't cut it at 50MHz.
But you are correct re the theoretical calculation of SFDR.
gl