Right. Judged by the O.P.'s specs, that one is a bunch of conceptual garbage. Also, it doesn't meet most of the specs, e.g. it's inverting, etc. I'm sure it's not John's circuit. Certainly it's not what I had in mind.
Here are Jeff Stout's specs:
- True logic; high input produces high output, etc.
- Operates with Vcc from 24V to 50V.
- High output is slightly less than Vcc, low is better than 6V less than Vcc (exa, Vh = Vcc - 0.5, Vl = Vcc - 6.0)
- Rising and falling edges should be as fast as possible.
- Load is from 10mA to a maximum of 125mA, and capacitance from 0 to about 1.5uF.
- spends most of its time in the high state.
- It transmits a signal between 1200 BAUD, and 9600 BAUD with a duty cycle of less than 10%.
Here's something like the five-part circuit I imagine John had in mind. It can provide a non-inverting 6V output with better than 10us risetime, assuming high-gain transistors, like those sold by Zetex. The circuit features a level-shifting current source (sink actually), which also sets the 6V output swing for the emitter followers. A power resistor can be added in Q3's collector for current limiting (the 6th part John mentioned).
. ------+------+---- + rail . | | 24 to 50V . 1.0k | . | |/ . +----| . | |\\e . | Q3 | noninverting 6V swing . | +--- output to 1.5 uF load . | Q2 | . | |/e Imax = 750mA . +----| BJT beta > 150 . | |\\ dv/dt = i/C = 6V in < 12us . Q1 | | . |/ | . +5 ----| gnd etc . |\\e | . 620 | V 6.3 mA for . o--/\\/\\---' logic LO . IN: 5V cmos logic . with 60-ohm gate Ron
Just to show it can be done with five parts. A few more parts could be used to improve the circuit, of course. Jeff can test it with spice, if he has the right transistor models.