It'd have to be a pretty crappy oscillator indeed, to have 1 ns jitter in an 8 ns clock period!
Okay, but the filters are 100k and 100 nF. Hard to believe that I'm going to get low-frequency supply bounce of 80 uV from that--it would take an ESR on the order of 2 ohms at 7 kHz to reach 1 LSB at 16 bits.
Not a bad idea.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 USA +1 845 480 2058 hobbs at electrooptical dot net http://electrooptical.net
Oh, I have seen worse than that with DFL. They work by switching the divider ratio on occasion so that "it fits".
100k is pretty high, not really a concern. Then the cross conduction spikes will matter more. But I'd let the spectrum analyzer be the judge.With all those boat anchors that you buy I bet there is an HP-3585 somewhere near you :-)
-- Regards, Joerg http://www.analogconsultants.com/
There's a broken one in the next room--it has a LO unlock problem and I've been too lazy to fix it. But my trusty HP 35665A would probably find it, if I averaged for a bit.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 USA +1 845 480 2058 hobbs at electrooptical dot net http://electrooptical.net
You could eliminate jitter by resynchonizing the PWM signal through a D flop.
This assumes you have the (what was it, 120MHz?) clock handy. Guessing that's generated by internal PLL multiplier, so that wouldn't work out real great. If you went to the trouble of an external PLL multiplier, you could still do it, with the added benefit of adjustable phase shift (in case the hold time isn't enough after pin delays and stuff).
At least you only need the one PLL, you can get it as stable as you like, and you can divvy up the flops however you see fit (individual gates might be easier to bypass than wide bus-driver models, etc.).
Hmm, if the jitter is *really* bad, could the uC's PLL be off by an entire cycle, or more? That might actually make things worse.
Tim
-- Deep Friar: a very philosophical monk. Website: http://seventransistorlabs.com
This is an interesting possibility. How about using DMA to fast GPIO-ports of the LPC ?
The DMAs on LPC1769 have linked list support, so you could set up the transfer and leave it on. If you're not short on RAM, you could dedicate the AHB memory bank for doing this so that CPU memory accesses do not interfere with the transfer.
There will probably be plenty of jitter, but does that actually matter in this case ?
-- mikko
On a sunny day (Thu, 29 Aug 2013 20:27:40 -0400) it happened Phil Hobbs wrote in :
Multi channel PWM with large precision asks for an FPGA?
Sphero pointed out that you might be able to use the SPI too. Using GPIO would be good for multiple channels, if the processor allows it. (Don't know about LPC but I have found the STM32 series to be quite picky about what can be DMA'ed to what).
-- John Devereux
I2S can also be used as an additional channel.
NXP has even an app note on doing GPIO-DMA:
-- Mikko
Yes I skimmed that just now. Always thought of it as some useless thing for MP3 players, but again could be good for precision analog. It can take an external clock too.
-- John Devereux
The system clock is a 24 MHz crystal oscillator, which gets multiplied by 5 by the internal PLL. I wouldn't expect that to generate nanosecond jitter, but it's easy enough to measure with a sampling scope.
(In my boat anchor collection I also have an HP5372A frequency and time interval analyzer. It's really just a glorified universal counter, and is a bit of a pain to set up, so it doesn't get used that often. It can measure jitter down to about 200 ps single shot, and less than that with averaging. That makes it better at low frequencies, as you'd expect from a counter.
If I were starting with one of those nasty jumbo shrimp, I mean programmable crystal oscillators, I'd be more worried about it. But anyway, it's suck-it-and-see time.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
If you still plan on 7kHz PWM frequency or somewhere else in the audio range you can use a laptop and this software:
It finds just about any dirt in the spectrum under 20kHz. The waterfall display is especially helpful because you can see the spectral moves when you change something. Best to use the laptop on battery, no power supply. Because some of them are lousay, as Archie Bunker would have said.
-- Regards, Joerg http://www.analogconsultants.com/
Phil Hobbs schrieb:
Hello,
are you sure that one puls of 8.33 ns length more or less will give you the necessary precision? If rise and fall time is about 1 ns their influence on the PWM puls will be too high I suspect. I would feel better if rise and fall time will be small compared to the minimum PWM puls width.
Bye
We went through all that in a previous thread, the one that John Devereux alluded to. As long as the pulse width is larger than the sum of the rise and fall times, the slopes contribute at most a small constant offset term.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Still trying to find hobby time to build it, want to try James Arthurs ripple corrector and the coarse/fine arrangement.
-- John Devereux
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