High res PWMs

Hi, all,

I've been working on an automatically-tweaked noise canceller design with my trusty code and layout Sherpas-in-training (my son and my younger daughter).

I need about 10 slow but high resolution DAC outputs for the tweaks, and I was thinking about using PWMs run from the LPC1769 processor.

I can close the loop on them with an on-board delta-sigma ADC (the AD7708 or maybe AD7718).

I'd need some level shifting and stuff to make the required voltage ranges in any case, so the complexity isn't that different.

Suggestions? Pitfalls to beware of?

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs
Loading thread data ...

Well, I spent far too long trying to figure out the cause of my grossly non-linear PWM, before truly comprehending the difference between a duty cycle and an on/off time ratio. :)

If you do a google search for

"agree that I am the superior theoretician"

...then you will find a nice thread about precision PWM! :)

James Arthur had a clever arrangement for cancelling the non-linearity from synchronous supply ripple.

But you get to read back the result and correct, seems like cheating really.

--

John Devereux
Reply to
John Devereux

To ease the problem of output filtering when using high resolution, have you considered using pulse density modulation instead? That way you can spread the required pulse width more evenly over the whole PWM cycle time and so remove the major low frequency components before filtering.

Andy

Reply to
Andy Bartlett

Daughters doing PCB layout? Is that really a good idea?

What kind of resolution and speed do you need?

The bummer with PWM is that the output frequency gets really low as the resolution increases, so you need a heroic lowpass filter to take the ripple out. It's an n-squared dilemma. Closing the loop might have interesting dynamics.

Coarse and fine summing might be interesting, to keep the frequency up. But that would need 20 PWM outputs.

How about a few quad SPI DACs?

--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

Our own Tim Wescot did an article about this I think:

Then there is the approach of merging coarse and fine PWM channels.

--

John Devereux
Reply to
John Devereux

Define "slow". Define "high resolution"

It depends.

PWM has several inherent problems such as dynamic nonlinearity, direct impact of clock jitter, and inaccuracies in the switch timing. Do careful estimate of those effects before getting to schematic.

Rule of thumb: PWM rate more then x20 bandwidth of the signal; then, most of nonlinear effects could be ignored up to 0.1% accuracy.

Vladimir Vassilevsky DSP and Mixed Signal Designs

formatting link

Reply to
Vladimir Vassilevsky

S-D with a different DAC -- same thing in the end.

Tim

--
Deep Friar: a very philosophical monk. 
Website: http://seventransistorlabs.com
Reply to
Tim Williams

I'm using a 120 MHz processor, and the timers can run right off the CPU clock, so at 16 bits I'm looking at 1.8 kHz. I took Tim's suggestion about the delta-sigma last time I used a PWM, and it works great.

If I run 14 bits and do a first-order delta-sigma extension by another 8 bits, that's 7.3 kHz, still reasonable for implementing the delta-sigma in the timer ISR. A two-section RC filter with 10 ms time constants will roll off the ripple by about 100 dB.

The CPU board is separate because I'm trying to keep this in a 1U Eurocard sort of format, and my layout person is a beginner. I do have SPI on the analogue board, but I'm resisting using dedicated DACs because they cost a fair amount when you need 10 channels at high resolution. I'm planning to get rid of the processor VDD variation by sending the PWMs to a 74HCT04 on the analogue board, and checking the two critical adjustments (offset voltage and current) using a couple of channels of an AD7708 or 7718 delta-sigma.

Version 1.0 of this box is going to _look_ very nearly all-analogue. It'll just have three photodiodes, power, two BNCs on the back, and a slide switch to go from linear mode to spectroscopy mode (fast log only)...plus this magic button that you press when you want it to adjust itself specifically to your current operating conditions.

The tweaking will be done based on calibration tables that the box generates for itself on the test stand, so in the field it's mostly slow and open-loop.

I've been doing a lot of thinking about how you'd put the entire calibration setup into the box, but I haven't come up with a scheme that I like. Generating modulated light for three photodiodes, that has to have adjustable ratios and still remain perfectly correlated to a part in 30000 over a wide frequency band is a fairly hard problem. Just using 3 LEDs is a non-starter.

I've been trying to get samples of electrochromic glass to see if I can do it optically on the cheap, but without great success so far. Bouncing the light off a nematic LCD is another possibility, and I suppose it would be possible to do some motorized thing, but, well, blech.

(My code guy wants to be able to put the display and controls in a separate box eventually. For a product that has to go in the guts of somebody's optical system, a remote interface box is pretty useful, but it's a bridge too far for V1.0.)

Since this is about 50% teaching vehicle, it may or may not work the first time round. I'm also teaching myself by putting in a lot of new tweaking ideas, some of which may also not work. (They simulate well, but that doesn't tell you too much when building noise cancellers.)

Fun stuff.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

I hadn't forgotten. ;)

I was mostly wondering about vaguely the sort of stuff that Vladimir was talking about, i.e. second-order sorts of things that don't exist in the frictionless spherical cow world.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Not quite so simple.

Did you check the numbers? Delta sigma extension is not so straightforward for PWM. Unlike PCM, the PWM is nonlinear. Shaped noise would be smeared back into the band of interest.

Check the numbers first. CPU clock jitter would be added into your signal also, as well as Vdd noise divided by slew rate.

Vladimir Vassilevsky DSP and Mixed Signal Designs

formatting link

Reply to
Vladimir Vassilevsky

I was just going to say that as well. And it's not VDD noise just from the rails. The PWM comes off of the substrate and metal layers. There will be lots of noise. IMHO a tall order to reach 14bit precision even if the PWM theoretically could do it.

Can be buffered with the HCT04 but then this quickly gets old. Also, the various sections of the HCT04 will modulate into each other. That results in slow beats and all sorts of fun stuff. The internal CPU clock jitter is next to impossible to get rid of. Considering the filtering and buffering effort I side with John. I'd use a nice multi-pack DAC.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

I'd have to bit-bang that, though, which might well be slower than a delta-sigma extended PWM.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Can't use SPI? That can be very fast, I think some chips have DMA-type capabilities for multi-byte transfers, but it's very fast anyway.

Best regards, Spehro Pefhany

--
"it's the network..."                          "The Journey is the reward" 
speff@interlog.com             Info for manufacturers: http://www.trexon.com 
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

22 bits is 0.25 PPM. That will be hard (ie impossible) to maintain irregardless of the digital algorithm.
--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

Interesting, thanks.

Most of my adjustments are closed-loop at some level, and the tweaking stuff is really slow--the issues are more resolution and repeatability than accuracy.

The clock jitter can't very well be more than a nanosecond at worst, and probably no more than 30 ps, I would think. Even 1 ns out of a 140 us PWM period is 1 part in 140,000, i.e. it's down at the 17-bit level, and that's with no filtering. Assuming that the (massively aliased) jitter is not pathologically worse at DC-16 Hz than 16 Hz-7 kHz, it should be at least a hundred times better than that after filtering, i.e. hard to measure.

I'd think that the same should apply to intermodulation between sections. The major mechanism for that would be supply voltage ripple caused by the loading of one section modulating the voltage swing of another, causing its average value to be in error. With a 5V supply, the ripple has to be kept below 5V/65536 ~= 80 uV to reach 16-bit accuracy. With a 7 kHz period and very light loading, I don't think I need anything very special by way of bypassing to reach that figure.

The odds are that I'm going to need another board turn anyway, so I'll try the HCT04 and see how it works.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Interesting idea. I need a bunch of them, though, and this chip only has two SPI channels.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 



160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

I should be so lucky, I agree. OTOH if I'm going to use delta-sigma, it's at least as easy to do a whole char's worth than to mask off the bottom bits to some sane and reasonable value. ;)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

Usually one channel is enough in this kind of situation. Either daisy-chain (push out all the bytes, update all at once) or in parallel (update one at a time), or series-parallel.

I haven't looked at the kind of DACs you're looking for, but if you can use an audio DAC it should be cheap and good (except DC performance, but you could fix that with a loopback if required).

Some of them need I2S, which your LPC supports, according to Digikey (didn't look at the datasheet). They may use SPI just for supervisory functions.

Eg.

formatting link

There are many more choices with 2 or 4 converters per chip.

Best regards, Spehro Pefhany

--
"it's the network..."                          "The Journey is the reward" 
speff@interlog.com             Info for manufacturers: http://www.trexon.com 
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

But none as cheap as a 74HCT04 for six channels!

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC 
Optics, Electro-optics, Photonics, Analog Electronics 

160 North State Road #203 
Briarcliff Manor NY 10510 USA 
+1 845 480 2058 

hobbs at electrooptical dot net 
http://electrooptical.net
Reply to
Phil Hobbs

True. But only if you use a clean crystal oscillator and not one of those highfalutin digital frequency loops. I don't know if the LPC has that but I have seen it in other uCs. Analog can get ugly with those.

It's not the rail at the pin but the "rail" inside the chip that could be a pain. Substrate, metal layers, bond wires. One trick to balance things a bit is to run a 2nd dummy HCT04 section with each PWM, but swing at opposite polarity and with the same load. That way the overall current swing of the chip is greatly reduced. I have solved a few EMI problems that way and the guys thought this is voodoo until they saw it on the spectrum analyzer. If you want to be extra good scope out how they are located on the chip and then pick adjacent ones for pairing them up.

Best is to hook up an analyzer and let two PWM's run at odd frequency, then look for crosstalk and mixing products.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.