- Hi to all,I have a logistic map equation ie Xn+1=4*Xn(1-Xn)
-
- using this i have to generate a 128 bits of output value always.My
- initial value will be 0.197 to 1.
- so output wil be always less than one but i need 128 bits value.Now
- can anyone tell me how can i
- have the digital design for this so that using that i will try to write
- VHDL code to simulate the same.I have matlab
- code for your reference.Hope anyone of you will guide me in this
- problem thank you.
- clc;
- format long
- N=3000
- N1=1400
-
- for k=1:100
- a = 0.197; % Lower bound
- b = 1; % Upper bound
- x = (b-a)*rand(1,1)+a
- Y=0;
-
- Y=0;
- for n=1:1:N
- x=4.*x.*(1-x);
- if n==N1
- y=x;
- end
- end
-
- c=[y,x]
- c1 = mat2cell(sprintf('%bx',y),1,[2, 2, 2, 2, 2, 2, 2, 2]);
- c2 = mat2cell(sprintf('%bx',x),1,[2, 2, 2, 2, 2, 2, 2, 2]);
- key_hex = cat(2,c1,c2)