Normally any QFN packages and the like that need to dissipate heat will have a thermal pad designed to transfer heat from die to a copper ground plane via thermal vias. Is it possible to improve the thermal conductivity by adding a aluminum heatsink directly on the PCB surface opposite the QFN package ?
Yes, we do that. The important thing then becomes to establish a good heat flow path from the thermal pad to the sink. That is typically a copper pad on the top side that solders to the thermal pad on the ic; a number of thermal vias; and a biggish pad on the bottomside that you bond the heatsink to somehow. The vias may then be a major source of thermal resistance, since they will probably be few and small.
An inner-layer heat spreader, a copper pour, can help, usually the ground plane itself. Make that layer 2 if possible and nail it to the heatsink pour with additional, largish vias outside the footprint of the ic.
John
Thanks for the photos. thats some densely packed PCB ! I am using 2 layer board so unfortunately I cannot take advantage of the extra copper you mentioned above. What have you used to bond the aluminum heatsink to the solder pad, I'm assuming the pad is not covered in soldermask ?
I was thinking epoxy. I would assume that the epoxy film thickness after pressing it down firmly would reduce to less than a few 10s of microns.
Will a grid of large 1mm diameter vias improve thermal conductivity between the IC's thermal pad and the copper pad on the opposite side of the PCB ?
Are you familiar with the on-chip diode method to measure die temperaure? If not, I'll write it up. Obviously, this is to be used to figure out the effectiveness of whatever scheme(s) you come up with. This is probably a situation where practical measurements are better then theory.
Some heat leaves the chip via bond wires, so extra copper on ground or supply also helps to cool the chip.
That sounds interesting - I for one would like to hear more about it. Where do you get the diode? Forward bias the ESD protection?
-- John Devereux
Yes, I'd interested. Assuming I find a diode , it'll need to be measured during power up. As John Devereux pointed out, a forward biased ESD protection diode on one of the logic inputs may be my only option.
Is it necessary to do a two point temperature calibration and extrapolate Vd vs T with the diode equation ?
Yes to the forward biased protection diode. Rather than using a diode equation, just feed the diode with a current source, which can be as simple as a bench supply and resistor. Then calibrate the diode by putting the part in an oven, sweeping the temperature. This realy only has to be done from room temp up to the maximum temp you want for the die. I'm not sure I'd trust a diode equation since the ESD diode often has some resistance in the model. However, I never tried to curve fit the data.
The current should be low, say 10uA. The DVM should be good, i.e. high impedance and at least 5 digits. Note you are injecting carriers into the chip, so look for odd behavior. You might also discover a factory test mode. ;-)
You can use this scheme to test thermal shutdown in regulators.The part will oscillate, i.e. you can see the hysteresis.
Silicone grease, and no solder mask. But the mask wouldn't add a lot of theta, I'm guessing. We use grease so we can remove/rework the ICs if necessary, and that involves removing the sink and heating the board. These chips are leadless Hittite 20 GHz distributed amplifiers, $200 each.
The limit on thickness, with epoxy or grease, is probably the flatness of the heatsink-pcb interface. Thermal epoxy or filled silicone grease will squash down below 100 microinches, 2.5 microns, which is about all I can reliably measure.
Absolutely. The vias are the only decent heat path from the ic's thermal pad to the world. Even better if they're filled with solder, although that will tend to make bumps on the opposite side.
John
Why the concentric arrangement of SMB sockets and associated parts? I like it.
robert
It's mixing (summing) ten signals coming in from other boards, over coax cables. The radial arrangement keeps the mixer paths symmetric (bandwidth here is about 3 GHz) and we liked the way it looks!
The connectors are MCX's, which look a lot like SMBs.
This is the final stage of a laser waveform modulator for the NIF laser. There are 48 modulator boxes, one per "quad" of four lasers, total 192 beam lines delivering about 1.5 megajoules of UV to the target chamber.
John
I'd like to know what you learned from this experiment.
Years ago, one of the apps engineers at Maxim took a chip that depended on power supply copper to cool it. He put in on a large PCB and kept cutting back the amount of attached copper with a dremel., yielding theta JA versus attached copper. I don't think it ever left the company. Yeah, this isn't the same as the internal copper slug, but a similar experiment might be useful.
To really get good thermal flow from the pins, the chip need fat bond wire. [Flow proportional to the cross sectional area of the wire, so a little thicker wire is a big deal.] Generally the factory doesn't provide that kind of information.
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