Higher order filters give more attenuation at higher frequencies, but with PWM the worst case gets to be the PWM repeat frequency - 200Hz in this case - and more than two or three poles isn't worth the effort
There's nothing goofy about using more than two transitions per PWM period. The more you divide up your marks and spaces, the lower the amplitude of the repetition rate ripple - 200Hz in this case. Breaking up your 1,000,000 clock edges into chunks that would mostly be 1024 clock edges long drops the worst case 200Hz ripple component by a factor of 1000, which helps the filter design no end.
There no linearity error except at the top and bottom ends where individual - nominally 1024 clock edge long - chunks start vanishing or fusing, so the number of transitions per cycle moves away from 2000 - at the bottom of the range, from 0% to 0.1% of full scale and at the top, from 99.9% of full scale to 100%.
You could always re-synchronise to a local clock on the other side of the isolation barrier ...