Flyback regulator / transformer problems.

Hi to all. Thanks the help. The phasing is correct as far as I know. I changed the aux winding around , but things got worse , so I assume I had it correct.The 5V output seems good , so I assume that it is correct.Tried changing it around and the supply weny haywire!! As to the core saturating. Surely if the core saturates the output voltage would fall. The output seems nice and steady under load. I'll try to go through all the tests you mentioned , sounds like fun!! I don't have a current probe , but I'll use a resistor to measure the current.100 ohm to 1k seems like a large value though. I'd have thaught a few ohms would be more appropriate , or am I miss-understanding you? Once I have the amp/turns figure , I'm not sure where to find the "effective length" from the data sheet. As you may have guessed ,I'm fairly inexperienced with this sort of stuff , so please excuse my ignorance!!

I'm not sure what you mean when you say " In any event, with a Ferroxcube P14/8 core of 3C18 material (or similar for that matter), i can easily get 1000V for a 56 turn 1000uH inductor; supply from about 5V to 200V (adjusted pulse width for constant peak current of 240mA).

cheers Rob

Start with a new coil former and wind only the primary (what the FET drives; i take it that is 53 turns for 600uH. Measure it on a bridge if possible. Set up a "dumb" circuit using the same FET as in the final circuit. Source to gnd, drive gate with (adjustable) pulse generator at about

I suspect that you may be saturating the poor core. In any event, with a Ferroxcube P14/8 core of 3C18 material (or similar for that matter), i can easily get 1000V for a 56 turn 1000uH inductor; supply from about 5V to 200V (adjusted pulse width for constant peak current of 240mA).

On the "input" side (when the FET is on), the equation E=-L*(dI/dT) is useful, in that measured values fit it fairly well. Errors are due to leakage inductance (pesky ringing) and core losses at the high frequencies seen (ignore pulse repetition rate for core loss here). So, use that equation, where E is the inductor supply voltage, dT is the gate width, dI is the peak ramp current, and L is the nominal inductance.

The energy put into the core during that time becomes available during the "output" side, mostly during the collapse of the magnetic field. You should see a fairly narrow high voltage pulse that is roughly flat on the top. There will be a bit of a peak after the rise, the top is usually sloped down some before the fall. Rise and fall times are approximately the same. Monitored current during that time will be roughly zero; actually starting from small positive, sloping thru zero near middle of voltage pulse, to small negative at pulse end. Then the current will be like a backwards ramp; jumps large negative and slowly falls back to zero, continuing positive, etc (ringing); seen at low pulse rates (say 10Khz).

You are obviously putting to much energy into the core for the load it is seeing; the open-circuit flyback peak is zapping your poor FET (i use the IRFBG20, a 1000V FET for my tests), and the voltage you see is limited by the FET avalanching. It is geting hot due to that, and the high pulse rate ("frequency").

At least you have the right idea in interleaving the feedback winding with the drive winding, and the mixing of the secondaries. All of that bother tends to reduce leakage inductance - at the expence of added capacitance and need for insulation against high voltages.

Hope this is of help.

Rob

Have you checked the phasing of the other windings WRT the 5V winding and the primary?

Regards

Graham Holloway

Even using the same basic transformer structure, the change in turns ratio (12V to 5V) would increase leakage inductance by a factor of 4. An RCD voltage clamp is one common method of limiting voltage peaks and absorbing this energy.

Voltage stress on the auxiliary winding, when configured as a flyback, occurs during switch 'on' time. Using your turns ratio, this stress will always exceed 50V + Vaux at nominal line input, so schottkys are not the best solution for this job. Use UF4004 or other jellybean 1A ultrafast rectifiers.

The auxiliary tolerance can be made more immune to primary spikes, by placing a resistor in series with it's rectifier. It's tolerance will be best when closely coupled to the winding supplying the regulated output.

RL

Hi there. Thanks for the help.I see you are refering to magnetic path length , so I should be able to make some progress from here, I hope. I did a measurement of the current on my board as it's running , and the core may very well be saturating. The FET source is connected to GND via a 1ohm sence resistor which is connected to the uc3842 via a low pass filter consisting of 1K to the current monitor pin and 470pF to gnd. The voltage across the 1ohm resistor rises linearly(about) to 400mV , and then sharply to about 3V. This indicates to me that the current is rising as it should to about 400mA and then the core is saturating and the current ramps up to 3A os so. The only thing stopping the smoke comming out is the uc3842s current sensing switching the output off.If the core is indeed saturating , how can I prevent this.I have used 2 app notes from different manufacturers(unitrode and infineon) and come out with similar parameters(turns , inductances etc)for the transformers. If the transformer is saturating , I must be doing somethig fundementally wrong:0( Any ideas. Cheers Rob

One ohm from FET source to ground; for current sensing. SMT for low inductance; if cannot do, use two 1/4 watt 2 ohm carbon comps, at 30-45 degree angle ontop of the ground plane - shortest leads possible. Then a 1K from the source to a test point; short lead at the soruce end. This isolates capacitive loading and other effects of probe loading on the circuit.

to prevent saturation: shorter pulse duration, more turns, longer path length, large cross section, ... Paul Mathews

snipped-for-privacy@yahoo.com wrote:

At 100KHz, this is a core saturation limited design, not a core loss limited one.

The core you are using shouldn't saturate under regulated conditions, using the turns, gap, voltages and power levels indicated (1A5 peak primary current @60W). Recheck your gap size.

The normally functioning circuit will saturate if the output voltage or power is doubled at high line, or if transient duty cycle exceeds twice that normally required, at normal line input voltage.

You should be limiting your duty cycle at start up, with a slow-start circuit, and reduce your control loop transient response to avoid this. Alternately, using a chip with a 50% duty cycle limit might also avoid the situation.

Your circuit is limiting reliably at a 3A level, in reaction to some other fault that is preventing the formation of flyback voltseconds. Output shorts, component breakdown, miswiring or phasing errors are candidates, though your normal initial ramp suggests that these are not present.

Recheck your frequency and voltage readings on the scope - are you reading the right scale?

RL

True enough as far as it goes, but probably not very helpful to the original poster. To get more flyback transformer power throughput one usually combines an increase in turns with an increase in gap length (of course the transformer will operate at a lower efficiency). Very little energy is stored in the core - most all is stored in the gap. For a given maximum flux density, increasing the gap volume increases the maximum energy stored.

PS: Were you able to understand and correct the errors you were making that lead you to incorrectly claim to have found "Another discrepancy (LTspice/switchcad3)" over in sci.electronics.cad, or do you require more help with the basics of circuit simulation?

--------- SNIPped for brevity ------- No, *LESS* turns if all else same. It is the Ampere-Turns that produces a given magnetizing field; more turns makes it larger, and more saturation at a given current (core the same).

Hi to all. I am finally getting somewhere!!! Thanks to all he help I've received here. I have changed my winding scheme to match that mentioned by RL. Seems to help a lot.I have increaced my source resistor to 3 ohms. This has stopped the core from saturating. I think that this was my main problem. I think I misunderstood the functioning of the chip in this regard. I assumed this was to limit short cct currents. It seems that this is not the case.It is there to terminate the "switch" conduction when a certain current is reached.I was therefor terminating the switch after the core had already saturated.I still have a bit to do , but the cct is currently running quite well(next to me now). The drain voltage of the fet is still going quite high , about 600V , but it is much better that it was , and also seems to have the correct "shape" as it where.A peak of 600V , rings for 3 cycles and then flat at 400V Just before the voltage falls to 0 (on time) it falls at an angle to about

I found that if i picked a FET from the available list, or faked a FET (IRFBG20 in particular - but not very well due to limited data sheet info), then the simple model of FET switching inductor "worked" - the waveforms matched the bench reasonably well. So now i have the agony of trying to model a pot core with autoformer winding for my flyback.

In article , Robert Baer wrote: [snip]

Hello Robert. I don't know if it helps, but this is a quick fudge for an autotransformer from an old textbook. It assumes that the auto is wound such that the pri and sec each occupy equal areas of the available space.

Model a two-winding transformer of equal size and flux density. Calc the numbers for copper loss, resistance refered to the primary, and leakage inductance.

To model the auto, use that two-winding transformer, but multiply each of those numbers by the fudge factor.

...

Then, after much discussi> Thanks again for all the help guys.

I'm still wondering what ever possessed you to use a flyback in a stepdown converter????

I'd have thought a buck, or forward for multiple tracking voltages, would have been more "appropriate". Or is this some sort of educational exercise?

Thanks, Rich

Thanks; will try that.

Reflected voltage too high ? A transient suppressor fixes that btw.

Sounds a bit like poor coupling

N27 !!!!!!

I barely thought you could even still get that !

You should be on at least N87 by now. That's perfect for 100kHz.

What are you using to simulate ?

Your hand wound construction technique may be a problem. Sadly you don't mention that. Have you measured leakage inductance ?

I have had no trouble with hand winding but I've done a few !

There's quite an art to winding transformers.

I found bags of useful info at

Btw - I had a 'sample' transformer made by a 'winding house' for a design I was working on with a Power Integrations part and it was useless. I did far better myself. Best to read up on this.

Were you using safety margins btw ?

Graham

Perfectly standard practice. Note 220V *AC* line in - 5V DC out.

Forward for 50W ! You're kidding right ?

Doesn't sound like it.

Graham

No, as a matter of fact, I'm not. I know I know dooledy squat about Shit My Pants mode power Supplies (that's a joke - SMPS - get it?) but I had always had the impression, from my days as a geek larva reading TeeVee set schematics, that the thing about a flyback (and car ignition coils, come to think of it) is that the voltage FLIES BACK, overshooting the supply so much that you need a catch diode to catch all the volts. But if you've already got 220 of them, and you only need five, wouldn't you store the excess volts in a buck inductor/cap? And I thought "forward" just because it seems so stodgy and straightforward, excuse the pun. Ya put so many watts in the primary, go down the turns ratio, and get .9x watts out the secondary.

When you're going from 220 to 5 volts, what "flies back?"

Trust me - it's definitely an educational experience for me! :-)

Thanks! Rich

Just to correct a possible ambiguity in the typing.

The multiplying factor is the square of (1-r).