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FLASH rom write fail problem.

[snipped]
  1. Do you detect failure during the Verify stage or sometime later?
  2. Are your timing loops debugged and tight according to the specification?
  3. What do mean about mixed allocation?

Barring a hardware defect (bus, etc.), the first thing I would look at is your write stage timing.

-Chaud Lapin-

Reply to
Le Chaud Lapin
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Dear All, I am using MXIC MX29LV160BT/BB FLASH rom, sometimes the flash rom write data will fail. I system blocks as below:

Memory Card => Card Reader => I/O detect interrupt => Read data to memory => Write data until finish.

I found our firmware will check the data after we write, and I check the MIXC MX29LV160BT/BB SPEC, it will go with follow steps:

  1. Write Data AAH
  2. Write Data 55H
  3. Write Data A0H
  4. Write Program Data/Address
  5. Data Poll from system
  6. Verify Data Ok? if not then loop.

Can we guarantee the write data procedure is correct after step.6 ( Pass Verify Data ) ? If there is a hardware error( some bit(s) be enforced to high or low, etc ), does it possible pass the step.6 ? What I want to say is, we already check the target data is the same as source, so I think the hardware part is correct, am I right?

Questionable:

  1. Does the data from memory card correct?
  2. Does memory allocation possible to be mixed?

These are only two reasons I can imagine...

Does any other possible thing?

Thank you so much for your help.

Best regards, Boki.

Reply to
<bokiteam
  1. Check the FLASH data every bytes when finish write 1 byte.
  2. No, no limit on this function.
  3. Mixed other variable/array/buffer/ memory allocation, a disorderly memory content.

For write stage timing, I found a description in MXIC spec:

--
The Automatic Programming algorithm makes the external system do not need to 
have time out sequence nor to verify the data programmed.
Reply to
<bokiteam

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