I think I have everything in there that needs to be...
Basically, step recovery diode (SRD) is forward-biased, and along with it, a schottky balanced switch thing, which is just an average FWB used different. When reverse-biased (through two inductors, which are coupled to encourage a somewhat balanced cutoff edge), the SRD loses charge then whams the schottkies off. RFCs and such isolate the GHz trash from the relatively low impedance transistors nearby, improving rise time I would suppose.
Not shown: input buffer, output holding cap, output buffer, etc. I suppose I should've titled this "Fast Switch.gif", but who cares, I'd use it just for S&H anyway.
An offset adjust (an intentional offset to one mirror and an adjustable one on the other) would be helpful, and some snubbers should probably be provided for the reverse-holding transistors' coupled inductor.
The "SW" input is high = off. It is logic level (with respect to -V); what voltage depends on the emitter resistor (4.7k specified is for about +/-10V supplies and drive from, say, an RTL stage running from same). A small capacitor across the 4.7k might be provided to increase turn-on time. Plain old 2N4401's should suffice for switching relatively slow SRDs (t_rr ~
100ns, t_snap < 500ps), which should likewise suffice for turning off the input cleanly for inputs slewing slower, which is like a couple GHz.Add a triggered delay and all that junk (see: Analog Sampler) and this oughta extend one's low bandwidth scope into the GHz range..!? Ooh, tasty.
Comments? Stupidities? (I'm sure there are some! ;o) )
Tim
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