Here's a little digitizer box
and the thermal image of same
The hot chip at the target is an LTC2242-12 12-bit ADC being clocked at 250 MHz. The bigger chip below is an Altera EP3C5F256 FPGA.
What amazed me is that we can actually get reliable data at 250 MHz, and process it, in a cheap FPGA. And that the FPGA isn't getting very hot. A 2 ns clock-data error would trash this data.
-- John Larkin, President Highland Technology, Inc jlarkin at highlandtechnology dot com http://www.highlandtechnology.com Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom laser controllers Photonics and fiberoptic TTL data links VME thermocouple, LVDT, synchro acquisition and simulation
We use an ad9228 it's a 12bit quad with serial lvds outputs, so that is a 300MHz data clock and data on both edges of the four data pairs
-Lasse
Well, it's hard to say, at the IO it is 250 Mhz but after that who knows how and where the data ends up ? btw, I still read the thermal image with fingers :-)
halong a écrit :
The last thermal image I got was of a PowerSO8 MOS that has 100V peak/27MHz at its drain... I prefer to use a thermal cam and save my magic finger :-)
-- Thanks, Fred.
Hmm. 27mhz ? Doesn't that kind of fall in the chicken chokers band ?
Jamie
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