Electrical Engineering Challenge

Nor does it say it is 400Hz or any other frequency. The magazine is published in the US and most of the contributors are in the US. So, if it is 50Hz, then my initial number (35mA) might be high by 6/5. So what? It is still useless and even more so. What would be your guess on that?

And lets face it, some standards are crazy. Vcc anyone? The new digital log ic gate symbols?

NT

Allow me to plug-and-chug some numbers using Radio Shack's _Voltage Regulator Handbook_ written by a group of National Semiconductor employees (ISBN 1124109374).

Vout = 5V. Vripple = 10% Vout = 0.5V (FWIW ARRL suggests 2%) Vp-p = 2 * Vripple = 1V Iload = 35mA

For low current supplies (Iout < 1A) capacitor selection is relatively straightforward. Capacitance is found by the simple formula.

C = (Iload / deltaV ) * 6 * 10E-3

where: Iload = DC load current deltaV = peak-to-peak ripple voltage ripple frequency = 120Hz

C = (35mA / 1V) * 6 * 1E-3 = 2,000 uF

Whoops. Beware of decimal point slippage. 2,000uF is way too large for 35mA. ROTFLMAO. Make it 2,000uF for 350mA and 200uF for 35mA.

Q=CV so C=Q/V Q = 35mA x 1/100th sec delta V = 1v C = 3.5uF

NT

which is still wrong... or my calc is somewhere

NT

The formula in 8.2 comes directly out of the Radio Shack book. Keep in mind that this is an old school power supply. Among other things, the sheer size/weight of the iron and capacitor motivated the development switching power supplies.

I can't say that I've ever seen an old school power supply that only used 10uF. OTOH, I've seen plenty of old school power supplies that used at least 200uF.

And if 200uF shocks you, just wait until you plug-and-chug ARRL style for a 12.6V @ 1A unregulated supply. :)

A two-percent ripple referenced to 12.6 volts is 0.25 V RMS. The peak-to-peak value is therefore 0.25 * 2.8 = 0.7V. This value is necessary to calculate the required capacitance for C1.

Also needed for determining the value of C1 is the time interval (t) between the fullwave rectifier pulses, which is calculated as follows:

t = 1 / f(Hz) = 1 / 120 = 8.3E-3

where t is the time between pulses and f is the frequency in Hz. Since the circuit makes use of a full-wave rectifier, a pulse occurs twice during each cycle. With half-wave rectification, a pulse would occur only once a cycle. Thus 120Hz is used as the frequency for this calculation.

C1 is calculated from

C(uF) = ((Iload*t)/Vp-p) * 10^6 = ((1A * 8.3 * 10^-3) / 0.7) * 10^6 = 11,857uF

The next standard value is 12,000uF

In days of old, men were bold, and switchers weren't invented...

LOL.

Sorry about that dude. Now for some reason IE didn't want to load this righ t so here in Firefox its spellchecker has bounced "chequer".

Not very continental of it eh ?

Anyway, I think the argument about being able to turn off the switch to cha nge the fuse does not wash. Most people unplug tings to change an internal fuse, and even if the thing is hard wired, the breaker to it should be turn ed off while working on it, at least initially. Plus the user touches the s witch.

That's probably what it is. Something like that, so simple we really don't pay much attention.

And no matter what anyone says, there should at least be like a 0.005 uF ca p across that switch.

Q=CV so C=Q/V Q = 35mA x 1/100th sec delta V = 1v C = 3.5uF

which one is wrong? Have I missed something in my calc above?

NT

The V in Q=CV needs to be the total voltage across the capacitor and not just the peak-to-peak ripple riding on top of the DC. It may help to think of it in terms of power.

but

Vout + Vreg = 5V + 3V = 8V

I don't believe that is correct. The V is actually the change in voltage. If you use the total voltage that would give you the time to charge the cap to the voltage from zero. The ripple voltage is the source of the delta V and is what should be used in the calculations for cap size. Input or output power has nothing to do with the cap. The cap is storing the "ripple" power only.

There seems to be nothing to say about that schematic, which is why this thread is so long.

Partways right but chsrge I*t you got wrong. To supply 35mA for 10ms with 1V droop requires C=350uF.

piglet

The reservoir cap only drops 1v between peaks, so one cant use the whole charge in the cap.

NT

Where is everybody getting the 35mA? From my post way upstream?

I was only trying to show that a 10uF input capacitor would have so much ripple as to render the max output current to 35mA if the regulator input voltage does not drop below the minimum specs.

Maybe that is not clear, either.

Okay, assume a 5V regulator with a min input of 7V to maintain regulation on the output without ripple. How much can the regulator stand as far as ripple is concerned and still do its job? The regulator can stand a max of 35V. So, how much current can be drawn from the input capacitor before the regulator input drops to 7V? That would be 35V-7V or about 28V delta V. So, how much current can you draw from the 10uF capacitor before you have an output ripple problem? I calculate about 35mA.

A 1000uF input capacitor would be, well, 100 times better than the 10uF. I do not propose the amount of ripple voltage that will occur in any of this. You must look at what the capacitor can stand given the ripple current.

I hope this explains my approach. Sorry if I misled anyone.

Cheers.

By itself a 78XX draws 8ma so that is about 8 volts ripple (100 Hz) before any load

You are correct. Delta V, the voltage droop, is the only voltage that appears in the capacitance equation.

My energy argument ties the capacitance equation, as stated by you, with the equations from the Radio Shack and ARRL books (and my intuition, but me simply proclaiming something "intuitively obvious" is unsatisfying in a mathematical sense). The governing equation for the energy stored in a capacitor's electric field is:

Wc = (1/2) * C * V^2 => C = (Wc * 2) / V^2

given:

Wc = 1V * 35mA = 35mW V = 8V + 1V droop = 9V

therefore:

C = (35mW * 2) / 9V^2 = 900uF

As others pointed out, 1A seems like a more reasonable output. In that case:

Wc = 1W

C = (1W * 2) / 9V^2 = 6,200uF

In either case, the 10uF cap shown in Circuit Cellar's challenge is woefully inadequate, as piglet more-or-less said from the get-go.

It's very easy to see what you expect and not what is drawn.

Jan's thermocouple powered LED schematic has most of the FETs drawn connected wrongly, no-one spotted that for 6 months.

Schematic design software should have an option to not allow two joints at a single point.

not this | ---+--- | but this | ---+--+--- | The line could skip from one confoguration to the opposite when dragged.

Hmmm... I asked about that several times and the only responses were that I knew nothing about electronics or how to read a schematic. The issue of crossed wires vs. connected wires was exactly one of my concerns.