dumb design, happy ending

Apr 19, 2014 7 Replies

I designed a 48-channel optoisolated digital input module, something having to do with a submarine. The customer wanted built-in-self-test, so I did this:



formatting link



The idea is to transformer-couple in a positive pulse and force the opto on, then a negative pulse to force it off, and check those in the FPGA. The original pulse sequence was intended to be +24 volts, then immediately -24, so we could test fast, essentially invisible to the customer in normal operation. It tests everything but the input resistor, which is light-years ahead of the previous/obsolete design.



Here's the transformer driver:



formatting link



But someone (not naming names here) screwed up. The transformers saturate in about 10 us at 24 volts, and that's not enough time for the optos to turn off if the customer has been driving them hard.



So we rescaled it to use 12 volt BIST pulses. That almost works but the OFF timing is marginal, 20 us pulses at +-12 volts. The only fix seemed to be to get new transformers with more volt-second saturation.



Then someone (no names) came up with this:



formatting link



The idea is to pre-magnetize the transformers, almost to saturation, before making the real test pulses. That gets us 30 us test pulses, plenty good. We threw in the final 15 us blip to remove any residual circulating current. Karla did the FPGA spin in 15 minutes.



John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation

ng to

s:

on, then a negative pulse to force it off, and check those in the FPGA. Th e original pulse sequence was intended to be +24 volts, then immediately -2

4, so we could test fast, essentially invisible to the customer in normal o peration. It tests everything but the input resistor, which is light-years ahead of the previous/obsolete design.

in about 10 us at 24 volts, and that's not enough time for the optos to t urn off if the customer has been driving them hard.

FF timing is marginal, 20 us pulses at +-12 volts. The only fix seemed to b e to get new transformers with more volt-second saturation.

re making the real test pulses. That gets us 30 us test pulses, plenty goo d. We threw in the final 15 us blip to remove any residual circulating cur rent. Karla did the FPGA spin in 15 minutes.

It beggars belief that someone would specify a pulse that would saturate th e transformer in the first place. Don't you design your transformers?

Or read the specs or measure the performance of transformers that you buy i n?

Granting that someone did drop off, the cure is a very neat solution. It lo oks obvious in hindsight, but "everything is obvious to the Supreme Court" to quote one of the more reliable maxims of patent law.

Bill Sloman, sydney

On a sunny day (Sat, 19 Apr 2014 16:03:14 -0700) it happened John Larkin wrote in :

mm capacitor is series with test drive?

Why are those opto's so slow????

Yeah, I get ~560ns propagation delay out of my 4N35s, what's your problem :^)

Tim

Seven Transistor Labs Electrical Engineering Consultation Website: http://seventransistorlabs.com

The caps in series with the transformer drives prevent the Ixys drivers from being blow up if the static logic levels were ever wrong.

John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation

They come that way. Actually, we clamp the phototransistor collectors up and down, to speed them up. They are a lot slower if they are allowed to saturate.

The clamped outputs go into an FPGA that essentially has comparator inputs, with the thresholds being the clamp voltage. That all works.

formatting link

formatting link

Part of the problem is that, as the customer's input voltage goes up, the turnoff gets slower, and that tangles with the transformer saturation limits.

Sloppy engineering, lucky fix. When luck is available, we accept it gladly.

John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation

On a sunny day (Sun, 20 Apr 2014 09:12:38 -0700) it happened John Larkin wrote in :

Sorry had not seen the pdf, was suggesting a cap in series here:

formatting link

OK, meybe forget it, this is getting complicated...

Join the Discussion

Have something to add? Share your thoughts — no account required.

Didn't find your answer?

Ask the community — no account required