Hi everyone, I am trying to figure out which is the best way to make a GND plane act as power dissipation area for a DPAK/D2PAK device (the L78M10ABDT from ST for example). Apart calculation of the area used, which I found in their AN1703, I am asking myself how to design this area: I have components only on the top side, and tracks for 90% on the top side too of a 2 layer PCB. So I have part of the top layer and almost all the bottom for GND plane. My specific questions are:1) how must I act with the solder stop layer? is it better to leave this "heatsink" area uncovered? both on top and bottom? or not? 2) vias: is it better to connect top and bottom with multiple vias or with few (I don't have limits from my pcb manufacturer)? big or little? (this providing a gnd plane also on top layer) 3) I have also, of course, a gnd plane on the rest of my pcb for the other devices (1 PIC , 4 relays and 4 other ICs, total current max 300mA@3.3V). should I make all a big plane, or make 2 polygons connected only in 1 point?
THese are the questions in my mind, of course all other suggestions are more than welcome.
thanks since now,