What if it is a static display? :>
The point is, you can't fashion a solution without more knowledge of how the display is driven.
Think about how you would do this with a "hardware monitor" (i.e., just looking at the signals on the pins of the displays).
If static drive, there's no "multiplex clock" that you can extract from digit enables *or* segment enables.
If multiplexed drive, (assume digit-at-a-time) you can be tempted to use a "digit enable" (whether common cathode or common anode) to "clock" the data from the "segment enables".
But, is the segment data "set up" prior to the digit enable? Is there a deadtime between chronologically sequential digit enables? Can two digits be enabled simultaneously -- even if only for a brief period?
Likewise, are the segment enables gated off before the digit enable is disabled? Or, after? Are they re-enabled for the "next" digit before that digit is enabled? Or, after?
The same sort of questions apply to how the *data* updates merge into the observations. There's no "clock" that you can reliably lock onto to know that a set of observations apply to one "reading" vs. the next/previous.
Damn near any design can easily be "wrong" and that only evident when it is actually applied to a real "display" (hopefully, the characteristics of the display don't *change* over time or from one unit to another).