Please try!
Thanks
Please try!
Thanks
niptechnology.com:
It might depend on the package/device , table 3.1 list the required caps
b) then. :)
Well it certainly beats what I've always done with DIL packages: strap an ugly looking, long-leaded ceramic over the top diagonally.
Yes sir. One less thing to worry about can't be bad.
Hilarious. A CLG484 "requires" about 56 caps, about a dozen of which are 47 uF or more.
I use about 10x 1uF ceramics total on a Zynq 7020 with DRAM. That's probably overkill.
OK, I'll ask the boys to do that on Monday.
ndsniptechnology.com:
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-PCB.pdf
Lee Ritchey talked about this in his class. I don't recall which vendor to ld him they didn't guarantee the design would work if he didn't use the exc essive number of caps recommended. His reply was, "Do you guarantee the de sign will work if I do follow the recommendations?"
In the case of Xilinx they don't know what your design is doing. They have to allow for every FF in the package changing state at the same time as we ll as every I/O changing in the same direction. What are the chances that will happen?
I happen to have some of the CLG484 Zynqs on the shelf:
If there are any caps in there, I sure don't see 'em. :( They usually jump out of the image, barium titanate being on the opaque side.
-- john, KE5FX
The ones I have came from a lot of 20 that I got from a surplus dealer in China. They look kosher enough, but I've never actually tried them. If you get a chance to X-ray yours, it'll be interesting to see if they match. It doesn't take much resolution to spot capacitors, given that no other features besides the balls themselves tend to be as opaque...
-- john, KE5FX
X:
p out of the image,
yeh I dound one on google,
I think what looks like caps are on the back of the board
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