Decoupling capacitor selection

Sep 14, 2005 28 Replies

I've had chips where the mfr has requested I put those low inductance vias to the ground and power planes *in* the device pads.

I didn't, and everything worked fine, although I did take great care with the decoupling. Obviously, that sort of thing has implications at board reflow.

On another much earlier point, caps up to 100uF are available in multilayer ceramic (although the 100uF are 6.3V, X7R,1210) which I have used extensively with no problems. To my understanding, the capacitor manufacturers are trying to increase the capacitance available, (with a generally lower voltage range) for low voltage, high current systems.

Cheers

PeteS

I read in sci.electronics.design that PeteS wrote (in ) about 'Decoupling capacitor selection', on Sat, 17 Sep 2005:

They've been doing that since around 1920. Equipment manufacturers always want more uF in fewer m^3.

Regards, John Woodgate, OOO - Own Opinions Only. If everything has been designed, a god designed evolution by natural selection. http://www.jmwa.demon.co.uk Also see http://www.isce.org.uk

I wrote on this issue on a thread some time ago on the issues of ceramics at the output of a switcher or an LDO. It can cause grief untold (as you found). It can be *very* difficult to get a switcher or LDO to operate properly with ceramics on the output within perhaps 3 cm of track (the track inductance helps to damp the low esr effect, of course). One trick I use is a 1 ohm resistor in series with the ceramic

- seems to work well. One can only be glad it drowned Mr. Limbaugh - I used to refer to him as the definition of Oxymoron - self definitional, I think ;)

Cheers

PeteS

Nor I - if that is what I designed in the first place :)

I had to 'redo' a design that was clearly not right - and that was difficult; indeed it proved impossible. The client insisted I could not change the layout, which made it almost impossible as the device used was designed for 1A (limited by the device used to a great extent) and the load could have 3A pulses. I eventually told the client that what was required (no layout changed and power did not deviate) was not possible.

He wasn't happy - oh well.

Cheers

PeteS

This is a bad thing ???? :-)

Was it this one?

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Hello Pete,

I have done that. But the assembly house folks are going to throw the pots and pans at you for that.

Past 1uF they tend to get expensive. On one design I had an electrolytic in there and someone changed it to ceramic. Unfortunately that was at the output of an LDO regulator and sure enough that LDO started singing the blues. It wanted an ESR below x _but_ above y. I guess that's the last time I have designed in an LDO regulator. Many of these things are IMHO the pits. The amazing thing was that the LDO produced a sawtooth from 3V to 5V and the board worked anyway with a precision this was only slighty reduced. But it drowned out Rush Limbaugh on the radio...

Regards, Joerg

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Hello Pete,

Actually I never had a problem with ceramics or for that matter any capacitors on switcher outputs. Next time I am squeezed for dropout voltage I am just going to design in a switcher. Then I know it works.

Regards, Joerg

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Hello Pete,

Nice.

With clients it's often the same as with patients. If someone with a hardcore cholesterol issue is told by the doctor to cut out the cheese burgers and then says that would be impossible, oh well.

Regards, Joerg

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