Hi, I am looking for hints on current sensing circuits for current controlled buck converters (peak mode).
As far as I remember the current sensing is done on the high-side PMOS. Another method makes use of the parastic R of the series inductor.
I am looking for solutions used in ASIC circuits. I remember a more or less "standard", elegant and quite simple circuit exploiting a fraction of the huge High-Side PMOS as a current copier that was part of the Vgs loop within a biaesd differential pair, creating unbalance on the loop and retriving information on sensed current.
I do not remember the exact topology, if somebody can provide some reference (papers, hints, links, handmade dratfs, direct explanations...) I would be grateful. I am also interested on solutions probing the current on the inductor (if somebody knows...).
Thanks in advance.