Current divider mirror

Ah! That was my off-the-top vision before realizing the Schmitt was bass-ackwards (or I guess the diodes could be considered bass-ackwards :-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.

Tim Williams a écrit :

Wanting to melt a dab of iron? :-)

--
Thanks,
Fred.

Just scrounge up one of my old MC4024 VCM's... they'll do about 30MHz (TTL), the ECL version would do about 300MHz... done on new processes I'm approaching 1GHz :-) ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.

It's probably trying to stop Q1 from oscillating. It probably doesn't.

John

Reference designators would help!

You could eliminate the dual diode and just let the upper PNP kill the

• side current source, with suitable shuffling. Saves some parts and power.

The behavior of Q1 versus pot rotation is interesting.

John

Beta only enters this as an error due to the base currents, which is of the order of 1/beta. In the case of the -2*I current sink there are

3 base currents effectively subtracted from the input current, so for a beta of 250 there will be about 1.2% error = 3/250 in the output current.

Didn't. It was a bit different because it was a linear IC design so the emitter resistors were not required to gobble up potential Vbe mismatch, and I shut off the |2*I| current source with a saturated transistor across the Vbe junction. It worked fine when built on a breadboard with monolithic transistor arrays.

Best regards, Spehro Pefhany

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"it's the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

I did that in an even earlier drawing (which I don't think I ever breadboarded, actually),

but turning off transistors slows things down. Nice part about diode gates, they are basically instantaneous.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

remember

Right. I missed a couple of lines so it looked beta limited to me. Need new eyeballs, maybe later this year. Besides, I'm busy saving the F16 fleet today.

We had understandings with most of our TAs. They left early, we left right after, we faked all the reports, everybody was happy.

Shorting the upper current-source Vbe junction is actually a better way to wigwag the triangle than the diode steering thing.

John

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Protest time.

free.fr...

the

than

posting a schematic here follows a predictable pattern :)

all the old guys laugh at how naive and horrible wrong it is, ...

old guys find glasses, and agree it might not be so bad....

20 post later they agree its a great design, they all did exactly the same 40 years ago except they used a few secret tricks that made it even more awesome

;)

--Lasse

messagenews:4b70a0fd$0$21600$ snipped-for-privacy@news.free.fr...

Except that this is not a great design. It's an interesting all-discrete breadboard that would benefit greatly from a few changes and a little math.

It does use the current mirror that I posted previously

ftp://jjlarkin.lmi.net/Mirror1.JPG

and for some reason mis-read as drawn. Luckily, usenet isn't life.

John

I hate to get back to the original question, but my brain itched last night...

There's a common circuit design that fills the original requirement handily: a transconductance multiplier.

Instead of a current mirror, Q1 and Q2 with the emitters tied together to a negative supply, add Q3 and Q4, and tie their emitters to that supply instead. base+collector of Q3 is fed a current (call it I_gain), and base + collector of Q4 is fed another current (call this I_ref).

Then you use two voltage-follower op amps -- buffer the potential on Q3's collector+base, and connect the emitter of Q1 to that output, and connect the emitter of Q2 to the potential on Q4's collector+base.

The balance equation now reads: Vbe_Q1 + Vbe_Q3 = Vbe_Q2 + Vbe_Q4

Multiply both sides by Q_e/kT, exponentiate both sides of the equation, and multiply both sides of the result by I_sat... then recognize the equation to have four terms which are all Ebers-Moll transistor emitter currents,

I_Q1 * I_gain / I_ref = I_Q2

Those are emitter currents, so it has another factor of alpha (the collector/emitter current ratio of Q2, which is nearly one).

I_output = alpha * I_Q1 * I_gain/I_ref

so it's actually a lot like a current mirror with adjustable transistor areas.

The transistors all must be at the same temperature (close and on the same heatsink, with small self-heating), and all have the same I_sat, so matched quad transistors are required. Mat-04 or THAT300 are candidates. The voltage-follower op amps hold the gain setting, so they haven't any slew rate requirements to speak of.

Usually, this kind of circuit is inconvenient because of the current- in and current-out configuration.