Core losses in dual big inductors

I finally remembered their URL...

formatting link
...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson
Loading thread data ...

Does anyone actually specify core loss? Or a Spice model that actually works in transient analysis? All I find model AC (small signal) lossiness only. ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Not really. There is a lot of hand-waving, inaccurate information, missing data. With inductors it usually already ends at the telephone, at the point where you ask which core material they use. Almost like asking Coca Cola about the secret sauces and magic potions in their concentrate.

That secrecy is the reason why I never really looked into simulation software for core loss. If you don't know where they get the cores it wouldn't make much sense.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

PSpice actually models cores. But I've never exorcized one >:-} ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Modeling is fairly useless if you can't get the data for it. What is output is no better than what you can input ...

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

Indeed! Simulations are only as accurate as the models.

For an amusing exercise, peruse and ponder LTspice's "alternate" solver and what different "parsing" means >:-}

You'll be stunned when you realize what's going on. ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

It'll run a lot slower. I don't see how that would elucidate much on the topic of core loss if once cannot get enough hard data about the ferrite behavior.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

The "normal" solver executable "parses" the schematic and loads ALL MODELS as BEHAVIORAL so as to attain bragging rights for best speed over all other simulators.

When this approach hangs, or gives fallacious results, you use the "alternate" solver which "parses" the schematic and loads real Spice models... e.g. diodes are no longer modeled as ideal switches, the real diode model is loaded ;-)

Too much bragging is made about speed... haste makes waste.

It seems what is needed is a Spice model of cores that properly models core loss during a transient simulation... the AC model doesn't do it.

As I mentioned before, PSpice has Jiles-Atherton core models. I've not played with these so I know not if that models core losses, but I'm going to look into it. And perhaps write my own behavioral equivalent which will play under other Spice Variants.

Likewise encrypted models... peeves me seriously. So I'm going to run them under their native simulator and write a general-use behavioral version right beside it and match all parameters. And distribute freely >:-} ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Huh? I am runnning LTSpice sims right now for a HV converter. Actually since tonight. No sleep, the root under a big crown has gone off :-(

The diodes are never assumed as ideal switches, including the one in the standard LTSpice library. What is behavioral is their chips. But without that a switcher start-up sim would take forever.

AFAIK Jiles-Atherton takes hysteresis, saturation and all that into account but not core losses. But it would be needed in the calculations. Is the other one the Preisach model?

That peeves me as well. Unfortunately all chip mfgs do it. And then everyone and their brother wants you to use their proprietary simulator. For LTC this has worked, I have used their chips on pretty much all design where cost was not a high priority. Like the one I am working on right now, all four converters are LTC-equipped. Due to LTSpice that lowers the design risk substantially.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

Diodes in default LT Spice have log curves, TCs, capacitance, all that stuff. Of course, you can sim an ideal diode, or a simplified one if you want, but if you use a 1N914 or whatever, it behaves like a real diode.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

Needs two boards, but occupies the space better -- should be easy to make one in a 4mm height. Footprint is still probably too big though. Maybe some chip Rs and Cs can be placed under it still?

I typically guess 50% ff on my transformers, mainly for bobbin and tape and not-quite-full layers, but also just because.

I don't think PCBs can go over 30%, at least very usefully. (Yeah you can make a trace 500 mil wide, but how much of that is actually carrying current?) I asked one well-established manufacturer, and they said you can't go with thinner traces than the thickness (obviously, no 10 mil traces on a 20 mil 'heavy copper' layer), and the prepreg inbetween likewise has to be thicker than the copper (some has to squeeze inbetween the traces of the facing layer, I suppose). A typical winding for something like this might use, oh, 2 or 4oz copper, 40 mil width traces,

8-10 mil spacing, and 10 mil prepreg (possibly 5 or 7.5 mil, you'd have to check). Enough layers for the required amp turns, and as many turns as can be squeezed in there.

Copper foil windings (foil in the winding plane, rather than printed) might be useful, but eddy currents chew them up, especially the inner turns of an inductor. Some companies claim to have a litz patterned foil that avoids that, don't know if they make anything microscopic enough for a mere 10 amps though (it's more of a 50A+ thing).

Tim

--
Deep Friar: a very philosophical monk. 
Website: http://seventransistorlabs.com
Reply to
Tim Williams

Lots of references...

formatting link

formatting link

formatting link

formatting link

Now to see if I can make sense of this academic hand waving >:-} ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

I've ran across a few series that actually provided core loss info. Not the most useful parameters (in terms of Bmax, yes, I know exactly what that is...sure..), but at least it's a start. They are by far the minority, which is bizarre, as if they never expected that us designers would, you know, actually apply AC to them, you know, use inductors to induct!

I did once contact Bourns regarding one of their toroidial parts, which they stated uses a particular Kool-Mu core. That was handy.

From another occasion, those Murata pulse transformers use Ferroxcube 3F3 cores, not too shabby.

Tim

--
Deep Friar: a very philosophical monk. 
Website: http://seventransistorlabs.com
Reply to
Tim Williams

In real life it's going to be complicated. There are unmentioned air gaps (epoxy that is often ferrite-colored), Eddy currents that will depend on core shapes, and so on. I think there has to be some sort of behavioral set as well, that gets experimentally evaluated for each core shape and size. Possibly even for each inductor.

Anyhow, in our case we'll have to measure it. So far we are down to about 50C above ambient. Mucho mejor que 85 grados. That is still a good

10 degrees more than I like but I think we'll get there.
--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

We are now trying to find the sweet spot between winding loss and core loss, where there is sort of an equilibrium. But first there will be an emergency session at my dentist. A root under a large crown has gone off. Wish me (and my wallet ...) luck.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

It might be interesting to compare the same core using Jiles-Atherton, and The Chan model that LTspice has.

--
"Design is the reverse of analysis" 
                   (R.D. Middlebrook)
Reply to
Fred Abse

The best way to design a switcher seem to be: simulate to get the basic dynamics close, then buy a bunch of parts and breadboard. Extensive simulation probably isn't justified, because the part models (magnetics, fets, cap ESR, thermals, all that) aren't worth the effort to get accurate. And you get to get out of your chair and drill and solder and stuff.

--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

I gave up licorice taffy last year after I encountered a strange hard spot in my taffy... $400 :-( ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

They also need to handle more complex transformers. Like any that would include say, a feedback winding.

And gapped cores/core gapping, which alters the entire tableau.

Reply to
DecadentLinuxUserNumeroUno

Is this the Tim Williams that has posted here...

formatting link
...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.