Leakage inductance of SEPIC dual-winding inductors?

Gents,

Dual winding inductors again. What's the leakage inductance or coupling factor on a typical little SEPIC dual winding inductor?

Say around 10uH and one amp or so, the really flat SMT stuff. Datasheets are silent about it and calling the mfgs is typically of little use. When it's not in the datasheet they mostly don't know. And I don't have one here right now to measure it.

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Regards, Joerg

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Joerg
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The one I measured was something like 99% for the K. I think the winding is done with a pair of wires not one at a time.

Year back I used one from Pico that was speced as over 98%

Reply to
MooseFET

If the characteristic isn't spec'd, then the word Sepic was introduced by marketing. The dual winding was initially present in some parts as a byproduct of fabrication limits - not as a requirement of the intended design.

Bifilar is cheaper and less error-prone for more easily balanced smd reflow-capable high-current structures. Sheilding reduces leakage. Both work against lower-ripple sepic function.

In small regulators, app engs seem to get away with murder.

RL

Reply to
legg

The (bigger) ones I've used in the past were also in that ballpark. But now I need one with an extremely flat form factor, only height matters.

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Regards, Joerg

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My impression is that datasheets are much more influenced by marketing than about 25 years ago when I started my career. If it doesn't look good it often is left off. See my other post where a company puts a warning in the datasheet that capacitance varies with voltage and then ... nothing. No data, not even a typical graph, zilch.

Yeah but, when you need small form factor dual coils it is very slim pickings. You've got to eat what's on the menu, unless you order by the truckload.

Tell me about it. I have seen a real design where they let the core peak to about 35% past (!) the -30% saturation point.

With app notes one has to be very careful. Often I've seen remarks like this or that transistor needs to withstand VIN plus VOUT, completely ignoring leakage inductance and ringout. So the reality would have been ... tsk ... *POOF*

Sometimes I understand why switch mode converter design can be frustrating for younger engineers.

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Regards, Joerg

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What is the buck side input/output voltage? What voltage/current do you need for the negative output?

John

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John Larkin

About 75V max in but could be negotiated down to maybe 60V. Minimum input is about 35V. Output +12V at slightly less than 400mA and -12V at

100mA.

I guess I'll have to let the PWM chip scream to get as far into CCM as I can. LTC doesn't give a max frequency but min off (low) time so I guess that'll be my limit here. EMC will be "interesting".

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On Mar 25, 8:18=A0am, Joerg wrote: [....]

I get custom inductors in small quantities all the time. It costs me zero extra dollars. ie: there is an extra zero on the right of the number of dollars.

Reply to
MooseFET

One zero would be ok but I found there's usually two zeroes tacked on ;-)

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