Cons of FPGA

krw wrote

I paid several times that much for the XACT routing tool.

However, I used it out of a batch file only - never really had to interact with it.

Indeed but do you know this is what the application uses, for sure? It also means you have to maintain a network card of a type whose MAC can be re-written; AFAIK most can't be.

I never understood why the vendors charged so much. The s/w cannot be used with any other chip.

The Viewlogic (Xilinx restricted) package could not be free because Xilinx (et al) had to pay for it.

Reply to
Peter
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for professional use.

That's pretty funny, since the paid for version is exactly the same, except it supports more chips. But yes, they have bugs. Sometimes very annoying ones, like the one where their tool for configuring a clock generator (DCM) decided to ground the clock output. Since it was an internal clock the tools cleverly optimized most of the logic away since it had no clock. The reason didn't exactly jump out either, so it took a while...

Reply to
Anssi Saari

I don't remember all the details of the software offerings, a decade back. Wasn't XACT the full package with the synthesis tools? Anyway, Alliance was the Xilinx specific PAR and timing tools only. Something else was needed to get up to the netlist.

I don't know now. IIRC, back then you could take your pick; MAC or disk S/N. I don't really care now, since the tools are free. Last year I was contracting for a defense company. They made all the tool choices (ISE and ModelSim) and supported the installations so didn't much care. ;-)

Back in '99-'01 the tools used printer port dongles. I justified a laptop (as long as I had to justify it to VPs it was a nice one ;-) as my design platform, so I could use the tools in the lab too. At one time I had over $75K in FPGA development software on it. Those days are long gone. Good thing, my current employer would croak if I gave them that bill. ;-)

Because they can. At least that was the answer I got when I asked the question. Their bean counters had to justify the development cost and "selling chips" wasn't good enough. Yes, dumb.

Yes, but Xilinx could have subsidized it. Actel does that now with Synplify for their products. Depending on the priority for the next project, I may use their part. The power consumption numbers look really nice for a hand-held device. My applications have no need for speed and flash configuration is a big advantage too. I'm also waiting to see the final specs on the Cypress PSoC-3. I'm hoping that it can replace most of our analog stuff and maybe displace FPGAs before we start. ;-)

Reply to
krw

krw wrote

XACT had no schematic entry support. It took the netlist, basically.

Reply to
Peter

Never used it. It must have come inbetween Alliance and ISE. I was doing processor development from '01 thru '06. I went back to FPGAs, after I "retired", because they were far more fun.

Reply to
krw

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