CMOS TLC555 reset input

Hi everyone!

Anybody notices that reset input on a TLC555 can accept a voltage, may be up to 15V, even if the chip is *not* powered? Unknowingly, I was driving that pin at 12V on one of my project for months without apparent effect. The reset input is still working. The datasheet says Vcc+0.3V for inputs but the equivalent circuit shows the reset input is directly driving a MOSFET gate. Weird!

Fred

Reply to
Frederic
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Trade yeah! I'm on a 555 project and it's being used in an unconventional way. What are the internal comparators input range? It's not obvious on the Nat Semi LMC555 spec sheet. I was forced to use 1.5V supply operation specs as used in timing applications. Trig min@1.5Vdd = 0.4V. Can the Trigger voltage go lower? Is it a rail to rail comparator? D from BC

Reply to
D from BC

TI's schematic shows resistors in series with all the inputs (most of which go to gates, plus Vc which goes to the divider network made from MOSFETs). It does not show the resistor values or the protection networks.

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The abs max input voltage is shown as Vdd. Clearly this can easily be violated by voltage on the timing capacitor or Vc bypass cap if the supply voltage falls rapidly at power off.

Have you measured the typical resistor value?

Best regards, Spehro Pefhany

--
"it\'s the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

Which resistor?

Reply to
Frederic

Good question in return. Logically the comparators surely can go to ground rail otherwise they would screw up when the cap is completely discharged at the beginning of the first timing cycle. Going lower in a probably unknown territory. For the Vcc rail, I would yes but I don't have any argument, I'll have to think about this...

Fred

Reply to
Frederic

One of the ones that is shown in series with the inputs such as /RESET. Probably they are all the same value. A crude way would be to measure the input current and divide it into the input voltage minus the supply voltage. Better would be to find the slope of the line with a couple of measurements. Obviously, I'm guessing that there is a protection network living on the other side of the resistors.

Reply to
Spehro Pefhany

The datasheet says there is ESD protection. I guessed, like you, it would be some kind of protection like the usual two-diode protection. But there doesn't seem to be an internal diode from input to Vcc (reason of my original question)However I'm gonna check below negative rail, if it clamps at say -0.7V then at least there is a diode there AND an easy way to figure out precisely the value of the input resistor.

Fred

Reply to
Frederic

--
They do screw up on the first cycle if they\'re wired up as astables.

That\'s because the threshold comparator\'s trigger voltage is at
2/3Vcc and the cap has to charge to that voltage from 0V when it
first starts.  Thereafter it only has to discharge to Vcc/3 for the
cycle to start again.
Reply to
John Fields

Maybe. The protection could be something like a zener, so measuring the slope of the V/I curve would give the value. The resistor may have the equivalent of a reverse-biased diode all along its length if it is sitting in a diffusion well (terminology?) for isolation. Jim T would be able to comment on the likelihood of this in a CMOS chip.

Best regards, Spehro Pefhany

--
"it\'s the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

Of course, you can fix most of that by using a pair of capacitors in series across the supply, with the one going to the positive supply half as large as the one going to the negative supply. The node between them is the timing node. This pair will start out at 1/3rd of the supply voltage when the circuit is powered up. They also act as a bypass for the 555 supply while doing their timing thing. This arrangement also cancels out most supply ripple sensitivity for the 2/3rd supply comparator reference, and half of the sensitivity for the 1/3rd level, usually eliminating the need for a capacitor on the reference pin, so it doesn't even add a component.

Reply to
John Popelish

If you connect a sensitive current meter in series with the pin, you should be able to see the onset of the protection clamping action, as you raise and lower the voltage on the pin (through the current meter). The protection may be a zener, not a pair of diodes to the rails.

Reply to
John Popelish

--
Yup. Neat trick!
Reply to
John Fields

the data sheet calls it Vs not Vdd

-3 to Vs +0.3 is safe for the device (top of page 3)

0.4 is the minimum level it could trigger at, what's not mentioned is the effect of the CV pin.

Bye. Jasen

Reply to
jasen

Yes..the absolute comparator input spec is a clue..But I don't think I can go on that for proper comparator operation.

I'd like to drive the control pin and trigger pin with near ground voltages.. By the way, this is not in any application note. All I know is it will work as low as 0.4V... below that..I dunno..

I've been thinking about the 555 start up behavior from other posters.... Reminds me of op amp phase reversal when max input levels are exceeded... .Is that what's happening?

D from BC

Reply to
D from BC

--
No.

Here\'s the equivalent of a 555: (view in Courier)

         Vcc                              
          |8                                
         [R]                              
    5     |                               
VC>-------+----|-\\                
    6     |    |  >---+            
TH>-------|----|+/    |  +-----+          3 
          |           +--|R   Q|----------->OUT
         [R]             |  _ _|     
__  2     |           +--|S R Q|--+       7 ___
TR>-------|----|-\\    |  +-----+  |   C---->DIS
          |    |  >---+     O     +-B Q1
          +----|+/          |         E
_  4      |                 |         |
R>--------|-----------------+         |
          |                           |  
         [R]                          |
          |                           |
          +---------------------------+
          |1
         GND 


What is it you want to know?
Reply to
John Fields
[snip]

k.. starting over... I'm wondering if my questions are confusing due to traditional 555 usage...Or I'm just missing the boat.. :) k...I'll put this another way.. What is the CMVR (common mode voltage range) of the internal comparators? Includes ground? For the TLC555 or LMC555. Or how about this: Vs= 12V Control Voltage Pin = 20mVDC constant Trigger Voltage toggles between 5mV and 15mV... Neglecting comparator offset voltage and disregarding everything else in the 555... Does the "trigger" comparator still work? Or are these values out of range (Too low)? I'd test this in SPICE but I don't trust my 555 model..It's got bugs. My backup SPICE program only has ideal model..

D from BC

Reply to
D from BC

ooh! I notice they only put 3V pk-pk modulation on that pin with a 5V supply hmm, doesn't sound good for 1.5V operation

--

Bye.
   Jasen
Reply to
jasen

--
Since the common-mode spec\'s for the comparators aren\'t revealed,
this:

"In monostable applications, the trip point on TRIG can be set by a
voltage applied to CONT. An input voltage between
10% and 80% of the supply voltage from a resistor divider with at
least 500-µA bias provides good results."

from the bottom of page 10 of:

http://focus.ti.com/lit/ds/symlink/tlc555.pdf

probably sums it up.
Reply to
John Fields
[snip]

Thanks... I didn't see that on the TI sheet. I've been beating the LMC555 National datasheets too much for clues.. Makes sense too that the comparators CMVR is not in the data table.. It's generally not a spec used directly in timing applications.

I got enough data to get a "good enough" design :) D from BC

Reply to
D from BC

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