C-multiplier again

A SM boost regulator followed by a LM317 (up to 80db PSRR)?

You're complaining about a 70dB improvement? There is a simple way to use your 0.7 volts, well maybe 0.8 volts, to get even more rejection: change your simple NPN follower into a Sziklai connection (AoE page 95). The base resistor across the added PNP creates a relatively-fixed collector current for your NPN, which means a fixed Vbe, for improved AC ripple rejection.

--
 Thanks,
    - Win

Ask yourself, does it really make sense to use a unipolar power supply? With 70 dB PSRR and 1 V ripple would be is 0,3 uV.

You would have to be very careful with the ground wire topology, in order to not destroy the PSRR.

A bipolar power supply would be more appropriate and not suffer from ground loop currents.

Alternatively an RC/RC voltage divider could be used to create the virtual ground reference for the op-amps.

Ask yourself, did I do that math right?

It's a 4-layer board with a solid ground plane.

I have bipolar power supplies. I need very low noise ones.

The circuit I'm doing has a lot of discretes, and every nanovolt of noise hurts.

John

How much current do you need to produce?

At low currents, a fast rail-rail op-amp can make a good clean power supply. They work with as little as 0.3V of head room. If you get the ones that are stable into a capacitive load, like the LT1498, you can bypass the output.

15 mA maybe, fairly steady. I'm running photodiodes and discrete jfets and such.

Right, I've been considering that. I have the LM8261 in stock, a rrio C-load amp that has low frequency psrr of about 100 dB. Noise is a little high, 10 nv per, but that's already 15x better than your typical voltage regulator. And I can get a better opamp by applying money.

I'm thinking about an R-C after the opamp, 10 or 20 ohms and a 120 uF polymer aluminum cap. That only costs 150-300 mV and has a corner frequency in the 100 Hz ballpark, so fixes the opamp's PSRR falloff at high frequencies and rolls off the wideband noise. The DC feedback can still be from the output, so regulation stays good. This is practically my existing circuit, without the transistor!

John

Since the problem is the Early effect, namely the effective C-E resistance bleeding ripple through, it didn't seem to me like the Sziklai thing would help. The PNP doesn't insulate the NPN from the ripple. So I spiced it. If the LT Spice transistor models are to be trusted, it's actually worse. The optimum value for the PNP's b-e resistor is zero.

John

The topology like this is stable and provides for ~100dB of PSRR.

You can also simulate huge LC filter with gyrators.

Oh, and the trivial solution would be cascading regulators one after the other.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

[...]

Phil promised 140dB:

Thanks for checking that. I'd say look at their Early effect values. They'll often throw in something like VA=50 volts, which is really crazy, IMHO. It's also true that subtracting the PNP's Vbe pushes the NPN's Vce down toward 0V, where it'd be saturated and not working well. So to use the PNP, you need a bit more DC operating room (like I said), and you have to lower the NPN base voltage with another resistor to ground. Just for kicks, try another 200mV. Spice isn't on my computer right now, so I can't try it myself.

--
 Thanks,
    - Win

To take advantage of the output C, the regulating element should have output with high impedance. Voltage controlled current source, ideally.

VLV

What's a more realistic Early voltage for a gumdrop NPN transistor? It would be silly if I were using a bad transistor model. I will be running at low Vce, as low as I can manage, so maybe I won't be in the really flat part. I suppose I should breadboard, grumble.

John

That's cute. And complex.

John

And I wonder about that wording, "stable". ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
      The only thing bipartisan in this country is hypocrisy

PhD design. What do you expect :)))

Here is a simpler idea:

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

Did you set the ESR with C4 to some low value ?

Win's idea looks pretty decent to me, IIUIC:

FIG. 1 (View in fixed font) =3D=3D=3D=3D=3D=3D

Q1 2n3906 Vin >--+----. .-------+---+------+--> +13.3v | V / | | | R1 ------ | R2 --- C1 470 | Q2 | 1k --- 15uF | | 2n3904 | | | '------+---. / =3D=3D=3D =3D=3D=3D \ ^ ----- | R3 33 | +14v >---'

LT Spice says 31uV of the 50mV 1KHz ripple gets through (32dBv), and the load step is 340uV. That's a lot stiffer than the original, which had a 4.5mV load step (d(i) =3D 2mA for both).

The Sziklai version has the same ripple; I don't quite understand how Early explains that--Early should wreck the load step response too, shouldn't it?

FIG 1's load step is only 60uV if you replace R1 with a 5mA current source, the 1KHz ripple stays the same.

This shunt filter only needs 200mV headroom:

FIG. 2 =3D=3D=3D=3D=3D=3D R1

+15V >--+------------------/\/\/\--------+--> Vout =3D 14.8v | 5 | | | | | | | | .-------+------+--------+ | | | | | | | | R6 | | | | 1k | | R3 R5 | |

Unconditionally stable with proper parameters. I.e. stable at any positive load impedance.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

kind of reminds me of a simple reg I made (age 14) using an incandescent lamp as part of the bias on the Power transistor.

Those were the good old days!.