Bizzare behaviour from SG/UC3525

Well, I should know better than to look at data sheets in my delicate condition *hic*, but you _did_ say that the low side went pfft? Where does it get its Vcc? Plus, I don't trust black boxes in general. ;-)

Thanks, Rich

I'd be tempted to link the Shutdown pin to 0V and do external shutdown with a clamp across the slow start capacitor. This would avoid uncontrolled re-starts if the shutdown command glitched.

Perhaps use a MOSFET with pullup to 12V so that any global undervoltage circuit has to generate an active pulldown to keep the 3524 Enabled.

The SG3525 data sheet does not say what happens to the (active) logic-low levels of the OUTs when it's power supply goes below 8v. At some unknown low supply voltage the OUTs might go to an open circuit. Would it be prudent to have safety pull-down R's on the IR2110 inputs?

human

we

The datasheet doesn't seem tremendously clear, but pin 9 (compensation) doesn't appear to have a tremendously strong driver. Although I doubt this is causing any problems, it may be at least conceivable very powerful noise could disrupt this signal. They show a 10nF capacitor hooked up to this pin in their lab test fixture.

I doubt this is your problem, but you might try putting such a capacitor in place just to verify this to be the case.

The more you write about it, the more suspect in my mind pin 10 becomes however (shutdown).

What exactly do you have all hooked up to the shutdown pin and how?

reset

of

a damn

Better go back to that datasheet I linked to above and re-read the text that appears on page 6 again. When driven high the shutdown pin will instantly turn off the output as well as set a latch that will keep the output off for the remainder of the given oscillator cycle. This means the output won't remain off for very long (as the output will turn back on again the very next oscillator cycle) unless the shutdown pin stays high.

The shutdown pin does more than just this however. It also activates a roughly 150uA current sink (extremely crude one if you study the block diagram) which begins discharging the soft start capacitor. If the shutdown pin doesn't stay high for very long, then the soft start capacitor voltage will not appreciably change. In this case the pulses would resume normally at full width the very next cycle of the main oscillator. On the other hand, if the shutdown pin is asserted for long enough to significantly discharge the soft start capacitor (through the roughly 150uA constant current sink), then the device should exhibit soft start effects when the shutdown signal is finally removed (actively driven to ground, the shutdown pin should never be left floating).

That isn't encouraging news. What does your output power stage look like? In particular what is the arrangement of the secondary(s) of the main power transformer? How is the output rectified? Do you use two inductors on the output for smoothing, or does the output of the transformer directly try to charge the output capacitors through the rectifiers? What is the output capacitance? Input capacitance and input voltage?

Vbus

the

wasn't fast

It

If the output power stage doesn't use inductors (and maybe even if it does, especially if the soft start feature doesn't function adequately), then the restart will be extremely stressful, especially if the output capacitors are large (which I assume they are). This can very easily lead to the desruction of IGBTs with no clear cause or reason for failure. Presumably the output capacitors store many joules of energy. If a capacitor is charged from a voltage source (without inductance, or with a small amount of inductance but in an uncontrolled fashion) the energy lost in the parasitic resistance is equal to the energy stored in the capacitors after they are fully charged. If the capacitors are allowed to charge rapidly and in an uncontrolled fashion without inductance, the IGBTs represent the bulk of the parasitic resistance and can therefore easily be destroyed. If the device is operated in burp/hiccup mode then the uncontrolled rapid charging/discharging/recharging stresses is all the worse. Device failure (presumably thermal failure) can occur even when the package is physically cool to the touch.

acronym

It seems you know the acronym I was referring to.

pin.

I'm starting to see where some of this confusion might be coming from. The datasheets aren't very good.

On Texas Instruments datasheet:

They show the block diagram on page one. In that block diagram they show how the internal connection is made between the shutdown input and the PWM latch as well as directly to the NOR output gates. When a high input voltage is provided at the shutdown pin (IE: 5.1V of Vref) current flows in through the internal resistor activating the internal "1.4V reference" composed of two diode drops as well as the crude current sink made by the NPN and 5k resistor. Evidently this 1.4V is enough to be registered as logical highs by the PWM latch and NOR gates.

I notice now that on the figure on page seven labeled "Lab test fixture" they don't depict the internal connection between shutdown and the PWM latch or NOR gates. I can see how that might make it hard to see why it should instantly (typically 200ns, max. 500ns) deactivate the output.

ST's datasheet shows a similar picture. The block diagram shows the connection while the lab test fixture does not.

Shame on ST and TI and whoever else does this in their 3525 datasheet. TI's text fixture is a little better than ST's datasheet in that they didn't leave pin 10 floating under any conditions.

Yes.

Not even remotely competitive with regard to price. Usually 2-3 X out of the ball park. Been there looked at it many times with regard to smaller flyback supplies. Also the 'form factor' needs to suit our product - not the other way round ! We're also not making 100,000 + of these so they won't tool up a special for us.

We did investigate a guy some yrs back who promoted himself in this respect. He came up with a design that's astonishingly similar to that I mentioned elsewhere in this thread that's made by one of the leading pro-audio amplifier manufacturers ( actually their Mark One version of amp with smps supply ). I'm not sure which one came first. His price was idiotic IMHO. I also know a company that actually engaged him to do indeed what you suggest and he made plenty of bangs himself and it took ages to tame !

I'm normally the guy who then gets employed to fix it ! I have a track record of resolving 'runaways' for other ppl. That's another story ( or several ).

Also - getting it right means we have the skill in house and can trot it out thereafter every time we need it - which will be often - trust me. Once we have the technology tamed we won't be using big line freq TXs anymore.

But this is no ordinary heart. It's not a type of design that neatly falls into most categories that an average psu designer would have met anyway !

I've done the required development very successfully in my employment time with regard to flyback designs.

Are you simply suggesting 'get someone else' who'll take another yr to make something that half works ? I've seen companies do that. I've seen what 'blokes who know' design. I'm not sure sometimes if I should laugh or cry. There is *no* way we can afford to be so sloppy. Managers like this approach though since it isolates them from responsibility - i.e. blame culture.

Anyway - that's not going to happen. I've never failed to take a project to a succesful conclusion.

I'm not one who shrinks from acquiring new skills. I also design audio DSP now. I didn't do that a couple of yrs back either. My effects ( reverb etc ) algorithms have been *very* well received ( i.e. bettter than what's typically available from OEMs out there ). That's the point of learning to do it yourself

- You're in control and can make it *better* than the usual junk. It's what I call R&D.

Quite possibly so.

As far as I saw, the shutdown pin simply discharges the soft start cap. I *know* it does this slowly since asserting shutdown briefly *doesn't* immediately reset the duty cycle to zero. This is a failure in someone else's implementation of this part that I'm aware of. I put a 555 mono there to stop that. It gets a damn good long shutdown signal from me.

They do normally !

Yeah - that really puzzled me. Only happened that way once after I put a 10nF decoupling cap to gnd local to the shutdown pin. I haven't tested the theory that the 2 are related since I'd run out of a supply of spare IR2110s at the time !

No. It's just a classic line freq TX with cap filter. It'll be a baby flyback switcher in production / next incarnation. Used a line freq tx for now simply for convenience. 1000uF of filter cap btw. Vsupervisory is about 14V typ. I'll make it a couple of volts higher on the real thing. No significant ripple voltage on it either.

That theory would indeed tend to explain such 'odd' behaviour. I'd believe that, if it wasn't that this certain company is making tens of thousand of these units every year with proven reliability that are the industry norm that couples these exact same 2 devices exactly the same way as me too !

I think you're right.

Implemented my own way using a current sense R in the return path to the Vbus centre tap.

I've got an LM393 looking at + - volts across the current sense shunt and sending a level shifted signal to a 555 mono that then asserts shutdown on the

Been tested ( adjusted the sensitivity to play with it ) - works a treat. It does that perfect 'burp mode'.

STD ? I rather think you don't mean sexually transmitted disease ! That acronym I'm not familiar with I regret.

Perfectly understood.

I agree.

You just read my mind !

One 'jellybean' transistor should do nicely.

This is where it gets fun - trying to second guess how the part actually works !

;-)

I bet it doesn't !

You read my mind - *again* ! I've been 'sleeping on it' btw.

I suspect we're heading towards a solution here.

Thanks, Graham

They did it seems !

That's interesting. Makes a pleasant change !

Graham

I mis-spelt Bizarre ! That's what warm temps do to you !

Apologies, Graham ;-)

Layout is critical ... and decoupling ... I have had trouble squezing enough decoupling onto those chips before. Seem to remember that there is an applciation note for the layout of that chip and that is pretty much *it* - it will *not* work in any other way.

You are picking up noise, and the 3525 output drivers are perfectly fast enough to generate it themselves. The driver chip probably plenty fast also. Maybe you slam the supply rails together.

Once you get the good scope out, you will see that one of the pins of the

From the SG3525 circuit of the error amp section that doesn't make sense? Pin2 (-ve IN) should be higher than pin 1.

An open-collector comparator into pin 9 (COMP input) is SG's first choice for pulse_by_pulse limiting.

They say that the Shutdown input can be used for p_by_p but only when there is no capacitor on the Slow-Start pin.

Radical rethink needed Graham.......

Shutdown pin to 0v. Your p_by_p Overcurrent comparator into COMP input. Any external UVLO discharges the Slow-Start cap.

What value is it, and could you please measure at some time what voltage it finally rises to?

| Misread. Should be N.Inv IN________|

The max CMV of the error amp is 5.2V, so it could be possible to connect pin 2 to the 5.1V ref and pin 2 at least 0.7V below it. This should put the output of the error amp at 3.8Vdc.

I'm beginning to wonder whether a more modern chip (LT1105?) might be easier/cheaper..............

Sorry. I didn't mean tied together !

One's tied low ( gnd ) and the other is tied to Vref.

That could be potentially useful actually ! It's simply a no-connect on my pcb at present.

And where did you get that nugget of info about the pulse limiting ? That's very, very interesting.

Quite !

Interesting. That explains how Big Company A's implementation has a failure mode I accidentally visited once. ;-)

It's 47uF currently since I deliberately wanted a very slow soft start to look at it closely. It would be 4.7 or 10 uF in practice most likely.

And yes - I'll measure the volts there.

Cheers, Graham

How much ( value, type ) would you typically use ? 0.1uF box film polyester type here. An MLC type presents no probs to me but modern film types are pretty hot.

That sounds suspiciously likely !

Graham

Yes, I follow you.

I rather suspect a draughting error on the data sheet !

As you say, it's not especially clear.

Yes.

Yes. I've seen this.

Indeed.

Now look at the application circuit ! Tell me if pin 10 isn't effectively 'floating' !

This data sheet is just truly awful.

Just a plain vanilla half-bridge !

Haven't even got as far as rectifying anything yet, I'm just trying to get the driver power waveforms right.

There are small Ls on the secondary side. I plan to look very carefully at the current waveforms. I'm not going to be caught out by that particular one.

Lol !

Graham

Yes, the last failure was indeed the low side driver. ( rolls eyes in puzzlement ) Its Vcc comes from the same supervisory supply as everything else. Locally decoupled. Didn't take any IGBTs out that time though. Just literally fizzzzed as I removed power and the rails sagged. The 3525 shouldn't have been switching at the time - I'd already asserted shutdown via a switch.

Graham

Yes. It would have decayed slowly too but faster than Vbus.

Yeah - 320V.

Actually I didn't. Interesting point but it worked when I replaced the IR2110 so I guess it's fine. A UF4006. Fast 1A 600V.

See above. ;-)

Quite.

I'll check it's a 4006 and not a 4004. Even so, the 4004 ( 400V ) should be fine.

The ones I'm currently using don't have the 'body diodes' so I have some MUR460s in parallel. Fast 600V 4A.

Yes, I agree. I just 'bumped up' the volts slightly actually. I plan to use a regulated supply ( flyback switcher ) to supply this rail in the final version. Probably about 16 ~ 17 V.

Graham

Tell me about it !

Good isn't it ! ;-)

Oh yes. You're right ! I'd previously taken the 2 data sheets to be effectively clones. That's an intruiging difference. Could explain a few things !

Many thanks, Graham

Off a 1989 Silicon General data sheet, 6th page, labelled Shutdown Options. Just above the test fixture circuit.... which also leaves pin 10 open when running.

Just to be sure. Pull COMP to 0v to do a shutdown via the PWM stage and R-S flipflop.

Resistor needed in series with the pulldown Tr then.

Thanks. Best guess atm would be up near the 5v1 Vref.

BTW: It's only a 60uA pulldown current. If I assume 47uF, and a required pulldown from 4V to 0.5V, then that would mean that the Shutdown pin has to be held high for 2.7 seconds before a full (safe) soft re-start can happen.