another bizarre architecture

Jan 31, 2007 188 Replies

Sounds like the delay has been down to bridging to/from the PCI bus, PCI is much faster than that. Maximum latencies can get large because of bus (req/grant etc.) delay, but minimum (when the bus is free or owned) are much below

1uS. However, for a monstrous mess like the x86 your figures are about the best one could expect, sound quite reasonable.

Dimiter

Not all of them have to be at the same priority for the effect to be seen. The event just needs to pass through a thread to end up being timed at that threads priority even if the thread waiting for that thread to finish dealing with it is at some other priority.

In spades.

Starting from Windows

-- kensmith@rahul.net forging knowledge

Before the time i have a 100 states in a state machine is look to "refactor" it into multiple interacting state machines of less than 12 states each.

JosephKK Gegen dummheit kampfen die Gotter Selbst, vergebens.   --Schiller

Not at all. The 32000 was pretty much a RISC design and VAX/microVAX is a thoroghgoing CISC architecture.

JosephKK Gegen dummheit kampfen die Gotter Selbst, vergebens.   --Schiller

Yes and no. The software tools for embedded designs matured, but the Micro$oft stranglehold on the desktop blocked it out.

JosephKK Gegen dummheit kampfen die Gotter Selbst, vergebens.   --Schiller

This is going to be of limited help. The small machines will have the dependencies spreading from one to another. The preemptive multitasking approach provides for shorter, clearer and more manageable code.

Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

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This is going to be of limited help. The small machines will have the dependencies spreading from one to another. The preemptive multitasking approach provides for shorter, clearer and more manageable code.

Vladimir Vassilevsky

DSP and Mixed Signal Design Consultant

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I've never done a state machine with more than maybe eight states. There are cases where multitasking makes sense, like when you have a report generator or serial command parser or some other slow-running eternal task that is easier to write as classic procedural code. But for fast bare-metal stuff, task switching overhead can be a killer, and realtime preemption can tangle logic lots worse than state machines.

One compromise is to have a single, main procedural task that is periodically interrupted by a state machine dispatcher.

I've written several preemptive multitasking RTOS's, but lately, working mostly on instrument controllers, I find I don't need them.

The real tests of an RTOS are: what's the maximum time that it ever runs non-interruptable? And what's the context switch time?

John

but IIRC it had a string compare instruction, block moves etc.

Cheers Terry

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