How could anyone design a digital interface this dumb? And why don't they hire English-fluent people to write their data sheets?
Their support people can't answer basic questions about this chip; they can't understand the data sheet either.
Most analog chip designers, especially ADI, do insane quirky digital interfaces. One ADI part has an SPI command that changes which clock edge the SPI interface works on.
-- John Larkin Highland Technology, Inc lunatic fringe electronics
TL;DR. What's stupid about this one in particular?
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
It appears - we aren't sure - that dropping CS does not reset any internal states, hence...
"The serial interface can be reset by writing a series of 1s on the DIN input. If a Logic 1 is written to the AD7792/AD7793 line for at least 32 serial clock cycles, the serial interface is reset. This ensures that the interface can be reset to a known state if the interface gets lost due to a software error or some glitch in the system."
So I guess we should reset it, and wait, every time we want to digitize the input. It's ambiguous if CS needs to be true for the
32-ones reset operation to work.It's also not clear if DOUT/RDY can be driven by the chip when CS is false.
We are having a lot of trouble getting reliable data out of this ADC, and the data sheet doesn't help. I volunteered to review the design to see if I could spot the problem, and I have: the interface and data sheet suck.
-- John Larkin Highland Technology, Inc lunatic fringe electronics
It seems to imply CS# needs to be Low to select the device. If you want to reset it by throwing 1's at it, select CS# first.
Cheers
AD7792_7793.pdf
The way I read it is /CS low and 32 clocks with DIN high then wait
500us. Are you bit banging the SPI or using a uC interface? You have to be careful with the DOUT pin because it is also a /RDY pin. A lot depends on how you are configuring the device, continious conversion, continious read, continous conversion, SPI command to read, ?? You are either going to poll the device for conversion complete or watch DOUT/RDY pin. It's hard to say from the timing diagram if /RDY will go true if /CS is false but the timing table on P6 calls out /CS falling edge to DOUT/RDY active. So I suspect DOUT/RDY will be high until /CS is driven low. The timing diagrams on P22 all show /CS low, then /RDY will go low, then they issue the read command and finally clock the data out.If you are continous read you poll or watch /RDY then just clock out the data. Fig 19 has that but it's not clear what would happen if you have continous SCLK.
-- Chisolm Republic of Texas
There is a timing diagram on page 6&7 of 32. It looks like a reasonable 4 wire interface. DOUT-BAR is muxed as RDY, but that seems manageable.
Does it not conform to that?
( Once upon a time, we talked at work about building a generic A/D tester, using some PIC or another that loops very fast and double checks all the constants from the data sheet. It got no bandwidth because it's not that hard debugging one on the production board. )
Also, it looks *SLOW* - samplerate < 1k; 470 Hz is used as an example throughout.
Also also: Total Phase has some nice I2C/SPI analyzers w/ USB interface. Haven't used them, but we have used their CAN debuggers and they're solid, if a little weird.
-- Les Cargill
It does have a simple SPI interface, but the internal states are a nightmare and the data sheet is not very clear. As noted, the ADI applications people can't answer questions.
It's a 24-bit delta-sigma, so it will be slow.
LTC recently announced a fast 24-bit SAR ADC with no missing codes, which seems too good to be true. I think it may be too good to be true.
We're using a 4-channel Rigol scope, which is enough for this case. The interface *should* be fairly simple.
-- John Larkin Highland Technology, Inc lunatic fringe electronics
Yeah, I reread the thread more carefully. Quite strange; I would not have expected that. I didn't quite understand the CS-bar high and reset ... thing. Youshouldn'thaveto...
My read of the data sheet is that t11 and t6 are critical. I would not think a reset is required unless the thing is totally useless.
I wonder if they'd throw some working PIC code at you?
TI makes several A/D like that that I know work.
SPI/I2C in general are annoying.
Different class of part, but I have 8 in a $500 USB box that run 96k @ 24 bits.
Agreed. SPI/I2C are frequently non-standards, though. Knuckle-bustin' time...
-- Les Cargill
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.