The FAQ for this ADC is sort of terrifying:
Basically, the internal SPI state machine counts bits forever, and deasserting CS doesn't initialize anything. If anything in the system ever misses one clock, it's hosed forever after.
Furthermore, the ESD diodes are useless, because if they are ever actually forward biased, the internal registers can be corrupted. That includes the ESD diodes on the analog inputs.
We seem to be doing everything right but when it's cold, say -10C, the SPI interface locks up maybe every 5 minutes, and only the 31-bit reset sequence will fix it.
The obvious question is, why would anyone design such a nightmare? But the more general question is, why are so many chips subject to bizarre behavior when a little current flows into their ESD diodes? You'd think that every semi house would have a mandatory ESD diode hazard review for every product. This has been an industry problem for decades now.