Source & Sink Capability of GPIO Pins

Is there any general specification for the Source & Sink Capability of GPIO Pins when used as outputs? ...Jim Thompson

-- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at

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| 1962 | I love to cook with wine. Sometimes I even put it in the food.

Reply to
Jim Thompson
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What do you mean "general specification"? The spec is going to depend on the chip maker, the product line, the model chip and even the specific pin. The only thing remotely like a spec were the various TTL variations from which a de facto standard emerged for 5 volt systems which can also be used for 3.3 volt logic. Below that each voltage has come up with its own levels which are not really standard at all.

Usually the standards only care about voltages anyway, so the current drive of outputs vary a great deal.

--

Rick
Reply to
rickman

What I need to know, if the user chooses to apply a signal to my chip from a GPIO, will my chip having an internal 100uA pull-up affect the accuracy of the applied voltage? ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142     Skype: skypeanalog  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Unless you can say *which* GPIO the question is like, "how long is a piece of string?" I suggest that you spec your input and let the user drive it with a suitable output. I assume you can figure out how to write the I/O spec? That's not intended to be offensive, I'm seriously asking since I think it is at the level of the question you are asking.

--

Rick
Reply to
rickman

I have requested the client clarify. I'm guessing that GPIO pins, when outputting analog, don't have buffers... just raw DAC outs. ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142     Skype: skypeanalog  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Lots of FPGAs have weak pullups, in that sort of ballpark, on their i/o pins, to keep them from floating and hogging a lot of shoot-through current.

But "accuracy"? Just tell them the min/max logic levels and note the weak pullup. Most logic chips that might drive your part can easily source/sink milliamps.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

GPIOs on most chips are complementary CMOS, HC-logic sorts of stuff. Where does a DAC come in?

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

I was told they (the customer) would provide a "DAC output via a GPIO pin". (Keep in mind the customer representative is a sales type who fathoms himself an engineer ;-)

I suspect that what I'm to be handed is actually PWM (analog ;-) ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142     Skype: skypeanalog  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

It could be a real DAC, overloaded onto a GPIO pin. There's no standard for DAC outputs; might be buffered, might not. Might be a string DAC with impedance varying with code. Might be a current.

Better try to talk to a real engineer.

--

John Larkin         Highland Technology, Inc 

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

There's usually a source current rating and a sink current rating. In the analog world I guess it's just considered load current for bipolar stuff.

Cheers

Reply to
Martin Riddle

No.

Reply to
sms

There are such specs on every processor and FPGA I've seen.

Reply to
krw

No, GPIOs on many uCs are multi--function (*really* general purpose). They mix analog and digital functions onto these pins.

Reply to
krw

I'm not sure if I understand better or if this is just leading me further down the rabbit hole. lol

Ok, so your client is sending you an analog level from an MCU. Some MCUs dedicate analog I/O pins, others share them with the digital I/O. I doubt the digital circuitry gets in the way at all, so you are just looking at an analog output. I would highly recommend that you get the datasheet for the part involved if you are presenting anything other than a high impedance input.

When you say a 100 uA pullup, is this *really* a current source or a FET wired as a resistor or really a resistor? When does it draw/source the

100 uA of current? Is this a part you are designing? Why don't you just make the input high impedance or use a lower current pullup?
--

Rick
Reply to
rickman

This is an already existing chip... designed (by me) for another purpose... natch; but now the customer wants to use it for another purpose in spite of it is not really a match :-( ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142     Skype: skypeanalog  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

JT has changed the "spec" three time in this thread !

Reply to
hamilton

I don't get the problem. Give him a spec on your input and either let them deal with the interface, or you can design an interface circuit once you see the data sheet on the DAC output.

Where is the problem?

BTW, is your input digital? If not, why do you have a "current source" on it? No, forget I asked that one. I don't really want to know.

--

Rick
Reply to
rickman

There are such specs on every processor and FPGA I've seen.

***

And they are all different. Even one single processor often has separate specs for various (groups of) pins.

petrus bitbyter

Reply to
petrus bitbyter

That's correct. And the original poster was very clear with is question.

Reply to
sms

It's an analog input with a precise 100uA current source pull-up to allow the user to simply add a resistor to ground to set a threshold value for an internal comparator. Now they want to force it with an external voltage source. I'm gathering that uP DAC outputs are weenie?? ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142     Skype: skypeanalog  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

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