Hi all, I have to design a cmos analog RF subtractor. Conditions it should be meet subtractor 1. ultra low power 2. No DC component in output 3. Large signals at input terminals 4. Gain must be unity.
I am waiting for assistance.
How can I design a RF analog CMOS subtractor
Dec 03, 2006
2 Replies
We're waiting, too. When's your homework due ?:-)
...Jim Thompson
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
For your homework? Oh well,
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