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Writing to Spartan 3 SRAM

Hello all, i am very new to FPGA design and struggling to understand how to write data to Spartan 3 SRAM. I am using verilog and my code looks like something bleow,

------------------------------------------------------------------- cs = 1'b0; ub = 1'b0; lb = 1'b0;

we = 1'b0; oe = 1'b1;

mem = i // i is a counter and mem is an 18 bit memory address

end

assign data = (oe)? input_data : 16'bz // data is the memory data

------------------------------------------------------------------- To my understanding this code will put the Input_data into memory addrees i, but do i need to loop this code a few times because the SRAM operates at 100 MHz, twice as fast as the 50Mhz FPGA.

What is the correct wat to write data to SRAM? ....Thanks !!!

Reply to
amir.intisar
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--
 __
/ /\/\ Aurelian Lazarut
\ \  / System Verification Engineer
/ /  \ Xilinx Ireland
\_\/\/
 
phone:	353 01 4032639
fax:	353 01 4640324
Reply to
Aurelian Lazarut

Xilinx has a good appnote

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You can also download sample code off of their website

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Eric

Reply to
Eric

Amir...

Well, your question indicates that you come from the SW background.

The things are a little different in the sense that the way the code is supposed to be written is approximately the following One alternative would be muiltiplying FPGA clock to get 100 MHz clock and use the following structure, which executed each time there is a rising edge of the clock.

always @(posedge sys_clk or negedge sys_reset_n) // clock is begin if (!sys_reset_n) begin // reset here all the stuff end else begin

end end

I hoope this information is sufficient from Verilog / HDL point of view. The hardware point of view is up to you...

Vladislav

Reply to
Vladislav Muravin

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